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Paper Abstract and Keywords
Presentation 2008-07-11 11:05
Improvement of the Leakage by Second Thermal Oxidation Process Power Trench Gate MOSFET
Chien-Nan Liao (National Central Univ.), Jhih-Chao Huang, Feng-Tso Chien (Feng Chia Univ.), Chii-Wen Chen (Minghsin Univ. of Sci. and Tech.), Yao-Tsung Tsai (National Central Univ.) ED2008-74 SDM2008-93
Abstract (in Japanese) (See Japanese page) 
(in English) Power MOSFETs are used as control switches in many application. Comparing with bipolar junction transistor, power MOSFET can be employed in high frequency system because of its high switching speed The power trench gate MOSFET structure is suitable for low voltage system and believed to be a good solution for obtaining low specific on-resistance because of the lack of parasitic JFET resistance and high cell density compares with the conventional power MOSFET. However, the high leakage current occurs from the gate and the source, which results from the loading effect, during the device etch process. In this study, we use second thermal oxidation process to form an oxidation layer to reduce the leakage.
Keyword (in Japanese) (See Japanese page) 
(in English) Trench MOSFET / Power MOSFET / / / / / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 122, SDM2008-93, pp. 183-186, July 2008.
Paper # SDM2008-93 
Date of Issue 2008-07-02 (ED, SDM) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee SDM ED  
Conference Date 2008-07-09 - 2008-07-11 
Place (in Japanese) (See Japanese page) 
Place (in English) Kaderu２・７ 
Topics (in Japanese) (See Japanese page) 
Topics (in English) 2008 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices 
Paper Information
Registration To SDM 
Conference Code 2008-07-SDM-ED 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Improvement of the Leakage by Second Thermal Oxidation Process Power Trench Gate MOSFET 
Sub Title (in English)  
Keyword(1) Trench MOSFET  
Keyword(2) Power MOSFET  
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1st Author's Name Chien-Nan Liao  
1st Author's Affiliation National Central University (National Central Univ.)
2nd Author's Name Jhih-Chao Huang  
2nd Author's Affiliation Feng Chia University (Feng Chia Univ.)
3rd Author's Name Feng-Tso Chien  
3rd Author's Affiliation Feng Chia University (Feng Chia Univ.)
4th Author's Name Chii-Wen Chen  
4th Author's Affiliation Minghsin University of Science and Technology (Minghsin Univ. of Sci. and Tech.)
5th Author's Name Yao-Tsung Tsai  
5th Author's Affiliation National Central University (National Central Univ.)
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Speaker Author-1 
Date Time 2008-07-11 11:05:00 
Presentation Time 15 minutes 
Registration for SDM 
Paper # ED2008-74, SDM2008-93 
Volume (vol) vol.108 
Number (no) no.121(ED), no.122(SDM) 
Page pp.183-186 
#Pages 4 
Date of Issue 2008-07-02 (ED, SDM) 

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