IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2009-03-06 13:30
A implementation of RSA encryption using Interleaved Modular Multiplication for MX Core
Wataru Kuroki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) CPSY2008-102 DC2008-93
Abstract (in Japanese) (See Japanese page) 
(in English) MX Core is a massively parallel SIMD(Single Instruction Multiple Data) type processor which have fine-grained computing units (PE:Prpcessing Element). The main target of operation in MX Core is multimedia processing. Therefore the MX core does not assume the implementation of the application that handle the multiprecision integer with several thousands bits. In this paper, we focus on the RSA encryption which is a kind of public-key crypto system with multiprecision integer arithmetic operation. Then we report the implementation method of the RSA encryption, which use the interleaved modular multiplication, and describe the evaluation result. From the simulation result, the throughput of 2,048-bit RSA encryption reaches to 1,550kbps on the MX Core that the processing frequency is 200MHz. As compared with the conventional implementation, the number of cycles is reduced by 31.7% and the throughput has improved 2.92 times.
Keyword (in Japanese) (See Japanese page) 
(in English) MX Core / RSA / SIMD / / / / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 464, DC2008-93, pp. 85-90, March 2009.
Paper # DC2008-93 
Date of Issue 2009-02-26 (CPSY, DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2008-102 DC2008-93

Conference Information
Committee DC CPSY IPSJ-SLDM IPSJ-EMB  
Conference Date 2009-03-05 - 2009-03-06 
Place (in Japanese) (See Japanese page) 
Place (in English) Sado Island Integrated Development Center 
Topics (in Japanese) (See Japanese page) 
Topics (in English) ETNET2009 
Paper Information
Registration To DC 
Conference Code 2009-03-DC-CPSY-SLDM-EMB 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A implementation of RSA encryption using Interleaved Modular Multiplication for MX Core 
Sub Title (in English)  
Keyword(1) MX Core  
Keyword(2) RSA  
Keyword(3) SIMD  
Keyword(4)  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Wataru Kuroki  
1st Author's Affiliation Kumamoto University (Kumamoto Univ.)
2nd Author's Name Masahiro Iida  
2nd Author's Affiliation Kumamoto University (Kumamoto Univ.)
3rd Author's Name Toshinori Sueyoshi  
3rd Author's Affiliation Kumamoto University (Kumamoto Univ.)
4th Author's Name  
4th Author's Affiliation ()
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Speaker Author-1 
Date Time 2009-03-06 13:30:00 
Presentation Time 30 minutes 
Registration for DC 
Paper # CPSY2008-102, DC2008-93 
Volume (vol) vol.108 
Number (no) no.463(CPSY), no.464(DC) 
Page pp.85-90 
#Pages
Date of Issue 2009-02-26 (CPSY, DC) 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan