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Paper Abstract and Keywords
Presentation 2009-04-13 12:40
[Invited Talk] A 1.6GB/s DDR2 128Mb Chain FeRAM with Scalable Octal Bitline and Sensing Schemes
Hidehiro Shiga, Daisaburo Takashima, Shinichiro Shiratake, Katsuhiko Hoya, Tadashi Miyakawa, Ryu Ogiwara, Ryo Fukuda, Ryosuke Takizawa, Kosuke Hatsuda, Fumiyoshi Matsuoka, Yasushi Nagadomi, Daisuke Hashimoto, Hisaaki Nishimura, Takeshi Hioka, Sumiko Dohmae (Toshiba Corp.) ICD2009-1
Abstract (in Japanese) (See Japanese page) 
(in English) Ferroelectric RAMs (FeRAMs) are expected to be the next generation semiconductor memory for their fast access speed (comparable to DRAMs) and the nonvolatility (like flash memories etc.). Our newly developed FeRAM chip is aimed at replacing DRAM. For that purpose, large capacity of 128Mb and high read/write bandwidth of 1.6GB/s are realized by introducing chain FeRAM(R) architecture and adopting DDR2 interface.
Keyword (in Japanese) (See Japanese page) 
(in English) ferroelectric memory / FeRAM / / / / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 2, ICD2009-1, pp. 1-6, April 2009.
Paper # ICD2009-1 
Date of Issue 2009-04-06 (ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ICD2009-1

Conference Information
Committee ICD  
Conference Date 2009-04-13 - 2009-04-14 
Place (in Japanese) (See Japanese page) 
Place (in English) Daikanso (Matsushima, Miyagi) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Semiconductor Memory Technologies 
Paper Information
Registration To ICD 
Conference Code 2009-04-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A 1.6GB/s DDR2 128Mb Chain FeRAM with Scalable Octal Bitline and Sensing Schemes 
Sub Title (in English)  
Keyword(1) ferroelectric memory  
Keyword(2) FeRAM  
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1st Author's Name Hidehiro Shiga  
1st Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
2nd Author's Name Daisaburo Takashima  
2nd Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
3rd Author's Name Shinichiro Shiratake  
3rd Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
4th Author's Name Katsuhiko Hoya  
4th Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
5th Author's Name Tadashi Miyakawa  
5th Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
6th Author's Name Ryu Ogiwara  
6th Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
7th Author's Name Ryo Fukuda  
7th Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
8th Author's Name Ryosuke Takizawa  
8th Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
9th Author's Name Kosuke Hatsuda  
9th Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
10th Author's Name Fumiyoshi Matsuoka  
10th Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
11th Author's Name Yasushi Nagadomi  
11th Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
12th Author's Name Daisuke Hashimoto  
12th Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
13th Author's Name Hisaaki Nishimura  
13th Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
14th Author's Name Takeshi Hioka  
14th Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
15th Author's Name Sumiko Dohmae  
15th Author's Affiliation TOSHIBA Corporation (Toshiba Corp.)
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Date Time 2009-04-13 12:40:00 
Presentation Time 50 minutes 
Registration for ICD 
Paper # ICD2009-1 
Volume (vol) vol.109 
Number (no) no.2 
Page pp.1-6 
#Pages 6 
Date of Issue 2009-04-06 (ICD) 

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