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Paper Abstract and Keywords
Presentation 2009-06-19 11:10
A Test Generation Algorithm Based on 5-valued Logic for Threshold Testing
Nobukazu Izumi, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) DC2009-12
Abstract (in Japanese) (See Japanese page) 
(in English) If the existence of a fault in a circuit only causes negligible effect on its application,
the fault is said to be acceptable. A method for generating test patterns of unacceptable faults for a given threshold
has been presented.
The test generation algorithm in the method works based on 16-valued logic,
and hence it can tightly evaluate the upper and lower bounds of errors , whereas
it may require large computational effort for the implication from every assignment
at primary inputs.
In this paper, we propose a new threshold test generation algorithm based on 5-valued
logic instead of 16-valued one.
In order to estimate the upper and lower bounds of errors as tight as possible with small computational
effort, the algorithm utilizes the result of $X$-path checking, which is an essential procedure
in the original PODEM, to the error estimation.
Experimental results show that the proposed algorithm can generate threshold test patterns
with small computational time compared with that based on 16-valued logic.
Keyword (in Japanese) (See Japanese page) 
(in English) acceptable faults / threshold test generation / error significance / PODEM / 5-valued logic / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 95, DC2009-12, pp. 13-18, June 2009.
Paper # DC2009-12 
Date of Issue 2009-06-12 (DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF DC2009-12

Conference Information
Committee DC  
Conference Date 2009-06-19 - 2009-06-19 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design, Test, Verification 
Paper Information
Registration To DC 
Conference Code 2009-06-DC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Test Generation Algorithm Based on 5-valued Logic for Threshold Testing 
Sub Title (in English)  
Keyword(1) acceptable faults  
Keyword(2) threshold test generation  
Keyword(3) error significance  
Keyword(4) PODEM  
Keyword(5) 5-valued logic  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Nobukazu Izumi  
1st Author's Affiliation Hiroshima City University (Hiroshima City Univ.)
2nd Author's Name Yuki Yoshikawa  
2nd Author's Affiliation Hiroshima City University (Hiroshima City Univ.)
3rd Author's Name Hideyuki Ichihara  
3rd Author's Affiliation Hiroshima City University (Hiroshima City Univ.)
4th Author's Name Tomoo Inoue  
4th Author's Affiliation Hiroshima City University (Hiroshima City Univ.)
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Speaker Author-1 
Date Time 2009-06-19 11:10:00 
Presentation Time 25 minutes 
Registration for DC 
Paper # DC2009-12 
Volume (vol) vol.109 
Number (no) no.95 
Page pp.13-18 
#Pages 6 
Date of Issue 2009-06-12 (DC) 

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