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Paper Abstract and Keywords
Presentation 2009-06-26 12:00
Fabrication of double-dot single-electron transistor in silicon nanowire
Mingyu Jo, Takuya Kaizawa, Masashi Arita (Hokkaido Univ.), Akira Fujiwara, Yukinori Ono (NTT), Hiroshi Inokawa (Shizuoka Univ.), Jung-Bum Choi (Chungbuk National Univ.), Yasuo Takahashi (Hokkaido Univ.) ED2009-94 SDM2009-89
Abstract (in Japanese) (See Japanese page) 
(in English) We propose a simple method for the fabrication of Si single-electron transistors (SET) with coupled dots by means of pattern-dependent oxidation (PADOX). It is well known that the PADOX convert a small one-dimensional Si wire formed on a silicon-on-insulator (SOI) substrate into a SET automatically. We demonstrated a fabrication of a double-dot Si SET when we oxidized specially designed Si nanowires formed on SOI substrates. We analyzed the measured electrical characteristics by fitting the simulation results and confirmed the double-dot formation and the position of the two dots in the Si wire.
Keyword (in Japanese) (See Japanese page) 
(in English) single-electron / Coulomb blockade / double-dot / silicon / SOI / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 98, SDM2009-89, pp. 189-192, June 2009.
Paper # SDM2009-89 
Date of Issue 2009-06-17 (ED, SDM) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ED2009-94 SDM2009-89

Conference Information
Committee SDM ED  
Conference Date 2009-06-24 - 2009-06-26 
Place (in Japanese) (See Japanese page) 
Place (in English) Haeundae Grand Hotel, Busan, Korea 
Topics (in Japanese) (See Japanese page) 
Topics (in English) 2009 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices 
Paper Information
Registration To SDM 
Conference Code 2009-06-SDM-ED 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Fabrication of double-dot single-electron transistor in silicon nanowire 
Sub Title (in English)  
Keyword(1) single-electron  
Keyword(2) Coulomb blockade  
Keyword(3) double-dot  
Keyword(4) silicon  
Keyword(5) SOI  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Mingyu Jo  
1st Author's Affiliation Hokkaido University (Hokkaido Univ.)
2nd Author's Name Takuya Kaizawa  
2nd Author's Affiliation Hokkaido University (Hokkaido Univ.)
3rd Author's Name Masashi Arita  
3rd Author's Affiliation Hokkaido University (Hokkaido Univ.)
4th Author's Name Akira Fujiwara  
4th Author's Affiliation NTT Basic Research Laboratories, NTT Corporation (NTT)
5th Author's Name Yukinori Ono  
5th Author's Affiliation NTT Basic Research Laboratories, NTT Corporation (NTT)
6th Author's Name Hiroshi Inokawa  
6th Author's Affiliation Research Institute of Electronics, Shizuoka University (Shizuoka Univ.)
7th Author's Name Jung-Bum Choi  
7th Author's Affiliation Chungbuk National University (Chungbuk National Univ.)
8th Author's Name Yasuo Takahashi  
8th Author's Affiliation Graduate School of Information Science and Technology, Hokkaido University (Hokkaido Univ.)
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Speaker Author-1 
Date Time 2009-06-26 12:00:00 
Presentation Time 15 minutes 
Registration for SDM 
Paper # ED2009-94, SDM2009-89 
Volume (vol) vol.109 
Number (no) no.97(ED), no.98(SDM) 
Page pp.189-192 
#Pages 4 
Date of Issue 2009-06-17 (ED, SDM) 

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