Information: Join today and make your research activities more affordable! Technical workshop participation fees and annual registration fees are available at member rates.
Notice: [Important] Announcement of Changes to Registration Fee Payment and Manuscript Upload Procedures for IEICE Technical Meetings
IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2009-09-25 09:00
Analysis of Process Variations by using Ring Oscillator
Akihiro Kaya, Koh Johguchi, Hans Juergen Mattausch, Tetsushi Koide (Hiroshima Univ.) CAS2009-36 NLP2009-72
Abstract (in Japanese) (See Japanese page) 
(in English) Process variations are rapidly increasing as the transistor size is scaled down. Therefore, the negative effects of the process variations, which have always been an obstacle to scaling, are becoming more remarkable.While the characteristics of circuit elements are influenced by the variations in different ways, the circuit performance generally varies increasingly and the yield of the VLSI systems and circuits becomes degraded. Thus, it is necessary to estimate accurately within-die and inter-die variations, in order to construct a design method for correct operation of circuits and integrated systems under these unavoidable variations. Here we report an analysis of ring oscillators, designed in a 90-nm CMOS and a 180-nm CMOS technology, and the determine of their frequency variations for different stage numbers and supply voltages. The measurement results are also used to separate the within-wafer and within-die variations. In particular, the variation dependence on the supply voltages shows that within-die variations increase 3-times faster than the within-wafer variations when the power-supply voltage is reduced from 1.0 V to 0.6 V.Consequently, the within-die variations are expected to limit the low-power operation of VLSI circuits in future small scale process technologies. Also we identified the correlation between within-wafer and within-die variations and the correlation to physical MOSFET parameters by the HiSIM circuit-simulation model.
Keyword (in Japanese) (See Japanese page) 
(in English) Process variation analysis / Ring oscillator / oscillation frequency / Within-wafer variation / Within-die variation / HiSIM / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 199, CAS2009-36, pp. 71-76, Sept. 2009.
Paper # CAS2009-36 
Date of Issue 2009-09-17 (CAS, NLP) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CAS2009-36 NLP2009-72

Conference Information
Committee CAS NLP  
Conference Date 2009-09-24 - 2009-09-25 
Place (in Japanese) (See Japanese page) 
Place (in English) Hiroshima Univ. Higashi Senda Campus 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To CAS 
Conference Code 2009-09-CAS-NLP 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Analysis of Process Variations by using Ring Oscillator 
Sub Title (in English)  
Keyword(1) Process variation analysis  
Keyword(2) Ring oscillator  
Keyword(3) oscillation frequency  
Keyword(4) Within-wafer variation  
Keyword(5) Within-die variation  
Keyword(6) HiSIM  
Keyword(7)  
Keyword(8)  
1st Author's Name Akihiro Kaya  
1st Author's Affiliation Graduate School of Advanced Sciences of Matter, Hiroshima University (Hiroshima Univ.)
2nd Author's Name Koh Johguchi  
2nd Author's Affiliation HiSIM Research Centor, Hiroshima University (Hiroshima Univ.)
3rd Author's Name Hans Juergen Mattausch  
3rd Author's Affiliation Research Institute for Nanodevice and Bio Systems, Hiroshima University (Hiroshima Univ.)
4th Author's Name Tetsushi Koide  
4th Author's Affiliation Research Institute for Nanodevice and Bio Systems, Hiroshima University (Hiroshima Univ.)
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
21st Author's Name  
21st Author's Affiliation ()
22nd Author's Name  
22nd Author's Affiliation ()
23rd Author's Name  
23rd Author's Affiliation ()
24th Author's Name  
24th Author's Affiliation ()
25th Author's Name  
25th Author's Affiliation ()
26th Author's Name / /
26th Author's Affiliation ()
()
27th Author's Name / /
27th Author's Affiliation ()
()
28th Author's Name / /
28th Author's Affiliation ()
()
29th Author's Name / /
29th Author's Affiliation ()
()
30th Author's Name / /
30th Author's Affiliation ()
()
31st Author's Name / /
31st Author's Affiliation ()
()
32nd Author's Name / /
32nd Author's Affiliation ()
()
33rd Author's Name / /
33rd Author's Affiliation ()
()
34th Author's Name / /
34th Author's Affiliation ()
()
35th Author's Name / /
35th Author's Affiliation ()
()
36th Author's Name / /
36th Author's Affiliation ()
()
Speaker Author-1 
Date Time 2009-09-25 09:00:00 
Presentation Time 25 minutes 
Registration for CAS 
Paper # CAS2009-36, NLP2009-72 
Volume (vol) vol.109 
Number (no) no.199(CAS), no.200(NLP) 
Page pp.71-76 
#Pages 6 
Date of Issue 2009-09-17 (CAS, NLP) 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan