| Paper Abstract and Keywords |
| Presentation |
2009-10-02 11:50
An 8-bit 600-MSps Flash ADC Using Interpolating and Background Self-Calibrating Techniques Daehwa Paik, Yusuke Asada, Masaya Miyahara, Akira Matsuzawa (Tokyo Inst. of Tech.) ICD2009-51 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
This paper describes a flash ADC using interpolation (IP) and cyclic background self-calibrating techniques. The proposed IP technique that is cascade of capacitor IP and gate IP with dynamic double-tail latched comparator reduces non-linearity, power consumption, and occupied area. The cyclic background self-calibrating technique periodically suppresses offset mismatch voltages caused by static fluctuation and dynamic fluctuation due to temperature and supply voltage changes. The ADC has been fabricated in 90-nm 1P10M CMOS technology. Experimental results show that the ADC achieves ENOB of 6.07 bits without calibration and 6.74 bits with calibration up to 500 MHz input signal at sampling rate of 600 MSps. It dissipates 98.5 mW on 1.2-V supply. FoM is 1.54 pJ/conversion step. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
Analog-to-digital converter / cyclic background calibration / self-calibration / interpolation / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 109, no. 214, ICD2009-51, pp. 99-104, Oct. 2009. |
| Paper # |
ICD2009-51 |
| Date of Issue |
2009-09-24 (ICD) |
| ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
ICD2009-51 |
| Conference Information |
| Committee |
ICD ITE-IST |
| Conference Date |
2009-10-01 - 2009-10-02 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
CIC Tokyo (Tamachi) |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Analog, Mixed analog and digital, RF, and sensor interface circuitry |
| Paper Information |
| Registration To |
ICD |
| Conference Code |
2009-10-ICD-IST |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
An 8-bit 600-MSps Flash ADC Using Interpolating and Background Self-Calibrating Techniques |
| Sub Title (in English) |
|
| Keyword(1) |
Analog-to-digital converter |
| Keyword(2) |
cyclic background calibration |
| Keyword(3) |
self-calibration |
| Keyword(4) |
interpolation |
| Keyword(5) |
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| Keyword(6) |
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| 1st Author's Name |
Daehwa Paik |
| 1st Author's Affiliation |
Tokyo Institute of Technology (Tokyo Inst. of Tech.) |
| 2nd Author's Name |
Yusuke Asada |
| 2nd Author's Affiliation |
Tokyo Institute of Technology (Tokyo Inst. of Tech.) |
| 3rd Author's Name |
Masaya Miyahara |
| 3rd Author's Affiliation |
Tokyo Institute of Technology (Tokyo Inst. of Tech.) |
| 4th Author's Name |
Akira Matsuzawa |
| 4th Author's Affiliation |
Tokyo Institute of Technology (Tokyo Inst. of Tech.) |
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| Speaker |
Author-1 |
| Date Time |
2009-10-02 11:50:00 |
| Presentation Time |
25 minutes |
| Registration for |
ICD |
| Paper # |
ICD2009-51 |
| Volume (vol) |
vol.109 |
| Number (no) |
no.214 |
| Page |
pp.99-104 |
| #Pages |
6 |
| Date of Issue |
2009-09-24 (ICD) |