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| Presentation | 2009-12-14 10:50 [Invited Talk] Experimental Evaluation Technique for Power Supply Noise and Logical Operation Failure Mitsuya Fukazawa (Renesas Technology Corp.), Makoto Nagata (Kobe Univ.)  ICD2009-77 Link to ES Tech. Rep. Archives: ICD2009-77 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Logical operations in CMOS digital integration are highly prone to fail as the amount of power supply (PS) drop approaches to failure threshold. PS voltage variation is characterized by built-in noise monitors in a 32-bit microprocessor of 90-nm CMOS technology, and related with operation failures by instruction-level programming for logical failure analysis. Combination of voltage drop size and activated logic path determines failure sensitivity and class of failures. Experimental observation as well as simplified simulation is applied for the detailed understanding of the impact of PS noise on logical operations of digital integrated circuits. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | dynamic power supply noise / built-in probing circuit / logical operation failure / dynamic frequency scaling / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 109, no. 336, ICD2009-77, pp. 7-12, Dec. 2009. | |
| Paper # | ICD2009-77 | |
| Date of Issue | 2009-12-07 (ICD) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | ICD2009-77 Link to ES Tech. Rep. Archives: ICD2009-77 |
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| Conference Information | |
| Committee | ICD |
| Conference Date | 2009-12-14 - 2009-12-15 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Shizuoka University (Hamamatsu) |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | ICD |
| Conference Code | 2009-12-ICD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Experimental Evaluation Technique for Power Supply Noise and Logical Operation Failure |
| Sub Title (in English) | |
| Keyword(1) | dynamic power supply noise |
| Keyword(2) | built-in probing circuit |
| Keyword(3) | logical operation failure |
| Keyword(4) | dynamic frequency scaling |
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| 1st Author's Name | Mitsuya Fukazawa |
| 1st Author's Affiliation | Renesas Technology Corporation (Renesas Technology Corp.) |
| 2nd Author's Name | Makoto Nagata |
| 2nd Author's Affiliation | Kobe University (Kobe Univ.) |
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| Speaker | Author-1 |
| Date Time | 2009-12-14 10:50:00 |
| Presentation Time | 50 minutes |
| Registration for | ICD |
| Paper # | ICD2009-77 |
| Volume (vol) | vol.109 |
| Number (no) | no.336 |
| Page | pp.7-12 |
| #Pages | 6 |
| Date of Issue | 2009-12-07 (ICD) |
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