| Paper Abstract and Keywords |
| Presentation |
2010-02-05 16:45
Evaluation of Line-Edge Roughness in Cu/Low-k Interconnect Patterns Atsuko Yamaguchi, D. Ryuzaki, Kenichi Takeda (Hitachi), Hiroki Kawada (Hitachi High-Tech.) SDM2009-192 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
To establish the method for evaluating Cu/low-k interconnect line-edge roughness (LER), resist, low-k, and Cu/low-k samples were observed with critical dimension scanning electron microscope (CD-SEM) and electric-field enhancement caused by LER was simulated. Wedge-shaped LER was observed in the edges of low-k and Cu/low-k patterns, and simulations showed that the wedges causes serious electric-field enhancement which can degrade time-dependent dielectric breakdown (TDDB) property. To predict the risk of TDDB, inspections of the wedge angle after low-k etching and Cu CMP are found to be required as well as that of the LER degree (3sigma). |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
Interconnect / Line-Edge Roughness / Time-Dependent Dielectric Breakdown / CD-SEM / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 109, no. 412, SDM2009-192, pp. 59-63, Feb. 2010. |
| Paper # |
SDM2009-192 |
| Date of Issue |
2010-01-29 (SDM) |
| ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
SDM2009-192 |
| Conference Information |
| Committee |
SDM |
| Conference Date |
2010-02-05 - 2010-02-05 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
|
| Paper Information |
| Registration To |
SDM |
| Conference Code |
2010-02-SDM |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
Evaluation of Line-Edge Roughness in Cu/Low-k Interconnect Patterns |
| Sub Title (in English) |
|
| Keyword(1) |
Interconnect |
| Keyword(2) |
Line-Edge Roughness |
| Keyword(3) |
Time-Dependent Dielectric Breakdown |
| Keyword(4) |
CD-SEM |
| Keyword(5) |
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| Keyword(6) |
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| Keyword(7) |
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| Keyword(8) |
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| 1st Author's Name |
Atsuko Yamaguchi |
| 1st Author's Affiliation |
Hitachi Ltd. (Hitachi) |
| 2nd Author's Name |
D. Ryuzaki |
| 2nd Author's Affiliation |
Hitachi Ltd. (Hitachi) |
| 3rd Author's Name |
Kenichi Takeda |
| 3rd Author's Affiliation |
Hitachi Ltd. (Hitachi) |
| 4th Author's Name |
Hiroki Kawada |
| 4th Author's Affiliation |
Hitachi High-Technologies corp. (Hitachi High-Tech.) |
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| Speaker |
Author-1 |
| Date Time |
2010-02-05 16:45:00 |
| Presentation Time |
30 minutes |
| Registration for |
SDM |
| Paper # |
SDM2009-192 |
| Volume (vol) |
vol.109 |
| Number (no) |
no.412 |
| Page |
pp.59-63 |
| #Pages |
5 |
| Date of Issue |
2010-01-29 (SDM) |