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Paper Abstract and Keywords
Presentation 2010-03-28 13:20
A Case Study of Duplication Technique for SRAM-based FPGA
Kyohei Shiraishi, Motoki Amagasaki, Morihiro Kuga (Kumamoto Univ.), Nobuhisa Fujiyama, Michihiko Inukai (Toshiba), Toshinori Sueyoshi (Kumamoto Univ.) CPSY2009-90 DC2009-87
Abstract (in Japanese) (See Japanese page) 
(in English) SRAM-based Field Programmable Gate Array (FPGA) is widely used in various applications such as industrial electronic devices, embedded systems and so on. However, SRAM-based FPGA has the problem of receiving the influence of Single Event Upset (SEU). Therefore, it is difficult to use it in the system that doesn’t permit malfunction. The present paper describes a technique for high-reliability of the protection relay circuit using
Duplication With Comparison (DWC) as a case study. We evaluate the area and recovery time about Full-DWC and Function-DWC. The results show that further possibilities of the Function-DWC.
Keyword (in Japanese) (See Japanese page) 
(in English) FPGA / Reliability / Duplication Technique / SEU / Protection Relay / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 474, CPSY2009-90, pp. 471-476, March 2010.
Paper # CPSY2009-90 
Date of Issue 2010-03-19 (CPSY, DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2009-90 DC2009-87

Conference Information
Committee CPSY DC IPSJ-SLDM IPSJ-EMB IPSJ-UBI IPSJ-MBL  
Conference Date 2010-03-26 - 2010-03-28 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To CPSY 
Conference Code 2010-03-CPSY-DC-SLDM-EMB-UBI-MBL 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Case Study of Duplication Technique for SRAM-based FPGA 
Sub Title (in English)  
Keyword(1) FPGA  
Keyword(2) Reliability  
Keyword(3) Duplication Technique  
Keyword(4) SEU  
Keyword(5) Protection Relay  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Kyohei Shiraishi  
1st Author's Affiliation Kumamoto University (Kumamoto Univ.)
2nd Author's Name Motoki Amagasaki  
2nd Author's Affiliation Kumamoto University (Kumamoto Univ.)
3rd Author's Name Morihiro Kuga  
3rd Author's Affiliation Kumamoto University (Kumamoto Univ.)
4th Author's Name Nobuhisa Fujiyama  
4th Author's Affiliation Toshiba Corporation (Toshiba)
5th Author's Name Michihiko Inukai  
5th Author's Affiliation Toshiba Corporation (Toshiba)
6th Author's Name Toshinori Sueyoshi  
6th Author's Affiliation Kumamoto University (Kumamoto Univ.)
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Speaker Author-1 
Date Time 2010-03-28 13:20:00 
Presentation Time 20 minutes 
Registration for CPSY 
Paper # CPSY2009-90, DC2009-87 
Volume (vol) vol.109 
Number (no) no.474(CPSY), no.475(DC) 
Page pp.471-476 
#Pages 6 
Date of Issue 2010-03-19 (CPSY, DC) 

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