| Paper Abstract and Keywords |
| Presentation |
2010-03-28 14:15
Development of a URL Filtering System for Ultra-high Speed Networks Kenji Toda, Mamoru Sekiyama, Takaya Kubota (AIST) CPSY2009-92 DC2009-89 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
The FPGA board having two DDR2 ports and six 10GbE ports is developed and implemented hybrid method using hash and binary search. In the system, the filtering of the URL black list of the feasible size is performed at the speed of several tens of Gbps. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
URL Filtering / FPGA / Hash / Binary Search / 10G bit Ethernet / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 109, no. 475, DC2009-89, pp. 483-488, March 2010. |
| Paper # |
DC2009-89 |
| Date of Issue |
2010-03-19 (CPSY, DC) |
| ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
CPSY2009-92 DC2009-89 |
| Conference Information |
| Committee |
CPSY DC IPSJ-SLDM IPSJ-EMB IPSJ-UBI IPSJ-MBL |
| Conference Date |
2010-03-26 - 2010-03-28 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
|
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
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| Paper Information |
| Registration To |
DC |
| Conference Code |
2010-03-CPSY-DC-SLDM-EMB-UBI-MBL |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
Development of a URL Filtering System for Ultra-high Speed Networks |
| Sub Title (in English) |
|
| Keyword(1) |
URL Filtering |
| Keyword(2) |
FPGA |
| Keyword(3) |
Hash |
| Keyword(4) |
Binary Search |
| Keyword(5) |
10G bit Ethernet |
| Keyword(6) |
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| Keyword(7) |
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| Keyword(8) |
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| 1st Author's Name |
Kenji Toda |
| 1st Author's Affiliation |
National Institute of Advanced Industrial Science and Technology (AIST) |
| 2nd Author's Name |
Mamoru Sekiyama |
| 2nd Author's Affiliation |
National Institute of Advanced Industrial Science and Technology (AIST) |
| 3rd Author's Name |
Takaya Kubota |
| 3rd Author's Affiliation |
National Institute of Advanced Industrial Science and Technology (AIST) |
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| Speaker |
Author-1 |
| Date Time |
2010-03-28 14:15:00 |
| Presentation Time |
20 minutes |
| Registration for |
DC |
| Paper # |
CPSY2009-92, DC2009-89 |
| Volume (vol) |
vol.109 |
| Number (no) |
no.474(CPSY), no.475(DC) |
| Page |
pp.483-488 |
| #Pages |
6 |
| Date of Issue |
2010-03-19 (CPSY, DC) |