| Paper Abstract and Keywords |
| Presentation |
2010-04-22 11:40
32% Lower Active Power, 42% Lower Leakage Current Ferroelectric 6T-SRAM with VTH Self-Adjusting Function for 60% Larger Static Noise Margin (SNM) Shuhei Tanakamaru, Teruyoshi Hatanaka, Ryoji Yajima (Univ. of Tokyo), Mitsue Takahashi, Shigeki Sakai (AIST), Ken Takeuchi (Univ. of Tokyo) ICD2010-5 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
A 0.5V 6T-SRAM with ferroelectric (Fe-) FETs is proposed and experimentally demonstrated for the first time. The proposed SRAM has a unique configuration to apply the body of NMOS and PMOS with VDD and VSS. During the read and the hold, the VTH of Fe-FETs automatically changes to increase the static noise margin, SNM, by 60%. During the sand-by, the VTH of the proposed SRAM cell increases to decrease the leakage current by 42%. The enlarged SNM realizes the VDD reduction by 0.11V, which decreases the active power by 32%. Since the transistor count is minimized to 6, the proposed SRAM realizes the smallest area. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
SRAM / Ferroelectric / FeFET / / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 110, no. 9, ICD2010-5, pp. 23-28, April 2010. |
| Paper # |
ICD2010-5 |
| Date of Issue |
2010-04-15 (ICD) |
| ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
ICD2010-5 |
| Conference Information |
| Committee |
ICD |
| Conference Date |
2010-04-22 - 2010-04-23 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Shonan Institute of Tech. |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Memory Device Technologies |
| Paper Information |
| Registration To |
ICD |
| Conference Code |
2010-04-ICD |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
32% Lower Active Power, 42% Lower Leakage Current Ferroelectric 6T-SRAM with VTH Self-Adjusting Function for 60% Larger Static Noise Margin (SNM) |
| Sub Title (in English) |
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| Keyword(1) |
SRAM |
| Keyword(2) |
Ferroelectric |
| Keyword(3) |
FeFET |
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| 1st Author's Name |
Shuhei Tanakamaru |
| 1st Author's Affiliation |
University of Tokyo (Univ. of Tokyo) |
| 2nd Author's Name |
Teruyoshi Hatanaka |
| 2nd Author's Affiliation |
University of Tokyo (Univ. of Tokyo) |
| 3rd Author's Name |
Ryoji Yajima |
| 3rd Author's Affiliation |
University of Tokyo (Univ. of Tokyo) |
| 4th Author's Name |
Mitsue Takahashi |
| 4th Author's Affiliation |
National Institute of Advanced Industrial Science and Technology (AIST) |
| 5th Author's Name |
Shigeki Sakai |
| 5th Author's Affiliation |
National Institute of Advanced Industrial Science and Technology (AIST) |
| 6th Author's Name |
Ken Takeuchi |
| 6th Author's Affiliation |
University of Tokyo (Univ. of Tokyo) |
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| Speaker |
Author-1 |
| Date Time |
2010-04-22 11:40:00 |
| Presentation Time |
25 minutes |
| Registration for |
ICD |
| Paper # |
ICD2010-5 |
| Volume (vol) |
vol.110 |
| Number (no) |
no.9 |
| Page |
pp.23-28 |
| #Pages |
6 |
| Date of Issue |
2010-04-15 (ICD) |