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Paper Abstract and Keywords
Presentation 2010-07-02 15:05
Impact of Floating Body type DRAM with the Vertical MOSFET
Yuto Norifusa, Tetsuo Endoh (Tohoku Univ./JST) ED2010-98 SDM2010-99
Abstract (in Japanese) (See Japanese page) 
(in English) Several kinds of capacitor-less DRAM cells based on planar SOI-MOSFET technology have been proposed and researched to overcome the integration limit of the conventional DRAM.
In this paper, we propose the Floating Body type DRAM with the Vertical MOSFET and discuss its basic operation using a 3-D device simulator. In contrast to previous planar SOI-MOSFET technology, the Floating Body type DRAM with the Vertical MOSFET achieves a cell area of 4F2 and its floating body cell by isolating the body from the substrate vertically by the bottom-electrode. Therefore, the necessity for a SOI substrate is eliminated. The basic memory operation of read, write, and erase for Vertical type 1 transistor (1T) DRAM is shown, and in addition, the retention and disturb characteristics of the Vertical type 1T-DRAM is discussed.
Keyword (in Japanese) (See Japanese page) 
(in English) Vertical MOSFET / Floating Body type DRAM / 1T-DRAM / 4F2 / / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 110, SDM2010-99, pp. 211-216, June 2010.
Paper # SDM2010-99 
Date of Issue 2010-06-23 (ED, SDM) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ED2010-98 SDM2010-99

Conference Information
Committee ED SDM  
Conference Date 2010-06-30 - 2010-07-02 
Place (in Japanese) (See Japanese page) 
Place (in English) Tokyo Inst. of Tech. Ookayama Campus 
Topics (in Japanese) (See Japanese page) 
Topics (in English) 2010 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices 
Paper Information
Registration To SDM 
Conference Code 2010-06-ED-SDM 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Impact of Floating Body type DRAM with the Vertical MOSFET 
Sub Title (in English)  
Keyword(1) Vertical MOSFET  
Keyword(2) Floating Body type DRAM  
Keyword(3) 1T-DRAM  
Keyword(4) 4F2  
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1st Author's Name Yuto Norifusa  
1st Author's Affiliation Tohoku University/JST-CREST (Tohoku Univ./JST)
2nd Author's Name Tetsuo Endoh  
2nd Author's Affiliation Tohoku University/JST-CREST (Tohoku Univ./JST)
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Speaker Author-1 
Date Time 2010-07-02 15:05:00 
Presentation Time 15 minutes 
Registration for SDM 
Paper # ED2010-98, SDM2010-99 
Volume (vol) vol.110 
Number (no) no.109(ED), no.110(SDM) 
Page pp.211-216 
#Pages 6 
Date of Issue 2010-06-23 (ED, SDM) 

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