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Paper Abstract and Keywords
Presentation 2010-08-27 13:45
70% Read Margin Enhancement by VTH Mismatch Self-Repair in 6T-SRAM with Asymmetric Pass Gate Transistor by Zero Additional Cost, Post-Process, Local Electron Injection
Kousuke Miyaji, Shuhei Tanakamaru, Kentaro Honda (Univ. of Tokyo), Shinji Miyano (STARC), Ken Takeuchi (Univ. of Tokyo) SDM2010-145 ICD2010-60
Abstract (in Japanese) (See Japanese page) 
(in English) A VTH mismatch self-repair scheme in 6T-SRAM with asymmetric PG transistor by post-process local electron injection is proposed. The asymmetric VTH shift is doubled from the conventional scheme without process and area penalty. Measurement results show 24% increase in SNM without write degradation by the asymmetric PG transistor. 70% read margin enhancement is achieved by the proposed scheme.
Keyword (in Japanese) (See Japanese page) 
(in English) SRAM / VTH variation / asymmetric transistor / read margin / self-repair / hot carrier / post-process / local electron injection  
Reference Info. IEICE Tech. Rep., vol. 110, no. 183, ICD2010-60, pp. 115-120, Aug. 2010.
Paper # ICD2010-60 
Date of Issue 2010-08-19 (SDM, ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2010-145 ICD2010-60

Conference Information
Committee ICD SDM  
Conference Date 2010-08-26 - 2010-08-27 
Place (in Japanese) (See Japanese page) 
Place (in English) Sapporo Center for Gender Equality 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Low voltage/low power techniques, novel devices, circuits, and applications 
Paper Information
Registration To ICD 
Conference Code 2010-08-ICD-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) 70% Read Margin Enhancement by VTH Mismatch Self-Repair in 6T-SRAM with Asymmetric Pass Gate Transistor by Zero Additional Cost, Post-Process, Local Electron Injection 
Sub Title (in English)  
Keyword(1) SRAM  
Keyword(2) VTH variation  
Keyword(3) asymmetric transistor  
Keyword(4) read margin  
Keyword(5) self-repair  
Keyword(6) hot carrier  
Keyword(7) post-process  
Keyword(8) local electron injection  
1st Author's Name Kousuke Miyaji  
1st Author's Affiliation University of Tokyo (Univ. of Tokyo)
2nd Author's Name Shuhei Tanakamaru  
2nd Author's Affiliation University of Tokyo (Univ. of Tokyo)
3rd Author's Name Kentaro Honda  
3rd Author's Affiliation University of Tokyo (Univ. of Tokyo)
4th Author's Name Shinji Miyano  
4th Author's Affiliation Semiconductor Technology Academic Research Center (STARC)
5th Author's Name Ken Takeuchi  
5th Author's Affiliation University of Tokyo (Univ. of Tokyo)
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Speaker Author-1 
Date Time 2010-08-27 13:45:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # SDM2010-145, ICD2010-60 
Volume (vol) vol.110 
Number (no) no.182(SDM), no.183(ICD) 
Page pp.115-120 
#Pages 6 
Date of Issue 2010-08-19 (SDM, ICD) 

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