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Paper Abstract and Keywords
Presentation 2010-11-12 14:15
Modeling of 2D Bias Control in Overlap Region of High-Voltage MOSFETs
Akihiro Tanaka, Yasunori Oritsuki, Hideyuki Kikuchihara, Masataka Miyake, Hans Juergen Mattausch, Mitiko Miura-Mattausch (Hiroshima Univ.), Yong Liu, Keith Green (TI) SDM2010-181
Abstract (in Japanese) (See Japanese page) 
(in English) High-voltage MOSFETs have been applied in a wide range of bias voltages from a few volts up to several hundred volts by optimizing the combined structure of MOSFET and drift region at its drain side. To realize high predictive circuit simulations for any structural variations, physically accurate compact resistor model has been developed by considering the resistive drift region explicitly, which features a complicated 2-dimensional (2D) bias-dependent current flow. The developed compact resistor model enables reproduction of the I-V characteristics for a wide range of structure variations with a small number of only 6 fitting parameters. The reported quasi-2D resistor model will be implemented in the 2nd generation HiSIM-HV compact models for high-voltage MOSFETs.
Keyword (in Japanese) (See Japanese page) 
(in English) HV-MOSFET / compact model / resister model / overlap region / 2D effect / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 274, SDM2010-181, pp. 53-57, Nov. 2010.
Paper # SDM2010-181 
Date of Issue 2010-11-04 (SDM) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee SDM  
Conference Date 2010-11-11 - 2010-11-12 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Process, Device, Circuit Simulations, etc 
Paper Information
Registration To SDM 
Conference Code 2010-11-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Modeling of 2D Bias Control in Overlap Region of High-Voltage MOSFETs 
Sub Title (in English)  
Keyword(1) HV-MOSFET  
Keyword(2) compact model  
Keyword(3) resister model  
Keyword(4) overlap region  
Keyword(5) 2D effect  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Akihiro Tanaka  
1st Author's Affiliation Hiroshima University (Hiroshima Univ.)
2nd Author's Name Yasunori Oritsuki  
2nd Author's Affiliation Hiroshima University (Hiroshima Univ.)
3rd Author's Name Hideyuki Kikuchihara  
3rd Author's Affiliation Hiroshima University (Hiroshima Univ.)
4th Author's Name Masataka Miyake  
4th Author's Affiliation Hiroshima University (Hiroshima Univ.)
5th Author's Name Hans Juergen Mattausch  
5th Author's Affiliation Hiroshima University (Hiroshima Univ.)
6th Author's Name Mitiko Miura-Mattausch  
6th Author's Affiliation Hiroshima University (Hiroshima Univ.)
7th Author's Name Yong Liu  
7th Author's Affiliation Texas Instruments (TI)
8th Author's Name Keith Green  
8th Author's Affiliation Texas Instruments (TI)
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Speaker Author-1 
Date Time 2010-11-12 14:15:00 
Presentation Time 25 minutes 
Registration for SDM 
Paper # SDM2010-181 
Volume (vol) vol.110 
Number (no) no.274 
Page pp.53-57 
#Pages 5 
Date of Issue 2010-11-04 (SDM) 

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