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Paper Abstract and Keywords
Presentation 2010-11-29 11:00
Evaluation of on-chip power noise generation and injection in SRAM core
Takuya Sawada, Taku Toshikawa, Tsubasa Masui (Kobe Univ.), Makoto Nagata (Kobe Univ./CREST-JST) CPM2010-125 ICD2010-84
Abstract (in Japanese) (See Japanese page) 
(in English) The noise tolerance of SRAM was evaluated by evaluating the power supply noise generation, and injecting the RF noise into the power supply in the test chip that was able to evaluate SRAM memory.
It was ascertained that the failure bit incidence tends to increase depending on the amount of the noise power as a result of evaluation of injecting the RF noise.
In addition,the possibility that the average voltage was dominant in the failure bit incidence was obtained.
The necessity for considering a dynamic power supply variation for the failure bit analysis was shown from these results.
Keyword (in Japanese) (See Japanese page) 
(in English) SRAM memory / bit failure / noise injection / power supply noise / / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 315, ICD2010-84, pp. 7-12, Nov. 2010.
Paper # ICD2010-84 
Date of Issue 2010-11-22 (CPM, ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPM2010-125 ICD2010-84

Conference Information
Committee VLD DC IPSJ-SLDM CPSY RECONF ICD CPM  
Conference Date 2010-11-29 - 2010-12-01 
Place (in Japanese) (See Japanese page) 
Place (in English) Kyushu University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2010 ―New Field of VLSI Design― 
Paper Information
Registration To ICD 
Conference Code 2010-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Evaluation of on-chip power noise generation and injection in SRAM core 
Sub Title (in English)  
Keyword(1) SRAM memory  
Keyword(2) bit failure  
Keyword(3) noise injection  
Keyword(4) power supply noise  
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1st Author's Name Takuya Sawada  
1st Author's Affiliation Kobe University (Kobe Univ.)
2nd Author's Name Taku Toshikawa  
2nd Author's Affiliation Kobe University (Kobe Univ.)
3rd Author's Name Tsubasa Masui  
3rd Author's Affiliation Kobe University (Kobe Univ.)
4th Author's Name Makoto Nagata  
4th Author's Affiliation Kobe University/CREST-JST (Kobe Univ./CREST-JST)
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Speaker Author-1 
Date Time 2010-11-29 11:00:00 
Presentation Time 20 minutes 
Registration for ICD 
Paper # CPM2010-125, ICD2010-84 
Volume (vol) vol.110 
Number (no) no.314(CPM), no.315(ICD) 
Page pp.7-12 
#Pages 6 
Date of Issue 2010-11-22 (CPM, ICD) 

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