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Paper Abstract and Keywords
Presentation 2010-12-16 15:10
[Poster Presentation] CMOS-Based Nonvolatile Flip-Flop Design and its Application to a Fractional-N PLL Frequency Synthesizer
Ge Wang, Jungyu Lee, Shoichi Masui (Tohoku Univ.) ICD2010-100
Abstract (in Japanese) (See Japanese page) 
(in English) A CMOS-based nonvolatile flip-flop (NV-FF) is proposed and implemented with a 180nm technology without any additional masks. This NV-FF is applied to a fractional-N phase-locked loop (PLL) frequency synthesizer for a smart key application for the output band selection and compensation of process variations in MOS capacitors. The additional pre-tuning of voltage-controlled oscillator (VCO) control voltage is executed with the combination of digital-to-analog converter (DAC) and NV-FF for the fast start-up and resulting low-energy operation.
Keyword (in Japanese) (See Japanese page) 
(in English) Nonvolatile memory / Analog circuit calibration / Fractional-N PLL frequency synthesizer / low energy / / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 344, ICD2010-100, pp. 31-36, Dec. 2010.
Paper # ICD2010-100 
Date of Issue 2010-12-09 (ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ICD2010-100

Conference Information
Committee ICD  
Conference Date 2010-12-16 - 2010-12-17 
Place (in Japanese) (See Japanese page) 
Place (in English) RCAST, Univ. of Tokyo 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Workshop for Graduate Student and Young Researchers 
Paper Information
Registration To ICD 
Conference Code 2010-12-ICD 
Language English (Japanese title is available) 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) CMOS-Based Nonvolatile Flip-Flop Design and its Application to a Fractional-N PLL Frequency Synthesizer 
Sub Title (in English)  
Keyword(1) Nonvolatile memory  
Keyword(2) Analog circuit calibration  
Keyword(3) Fractional-N PLL frequency synthesizer  
Keyword(4) low energy  
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1st Author's Name Ge Wang  
1st Author's Affiliation Tohoku University (Tohoku Univ.)
2nd Author's Name Jungyu Lee  
2nd Author's Affiliation Tohoku University (Tohoku Univ.)
3rd Author's Name Shoichi Masui  
3rd Author's Affiliation Tohoku University (Tohoku Univ.)
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Speaker Author-1 
Date Time 2010-12-16 15:10:00 
Presentation Time 120 minutes 
Registration for ICD 
Paper # ICD2010-100 
Volume (vol) vol.110 
Number (no) no.344 
Page pp.31-36 
#Pages 6 
Date of Issue 2010-12-09 (ICD) 

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