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Paper Abstract and Keywords
Presentation 2011-01-14 10:35
Boosting of Blocking Voltages in GaN Transistors by Widening Depletion Layer in Si Substrate
Hidekazu Umeda, Asamira Suzuki, Yoshiharu Anda, Masahiro Ishida, Tetsuzo Ueda, Tsuyoshi Tanaka, Daisuke Ueda (Panasonic Co.) ED2010-184 MW2010-144
Abstract (in Japanese) (See Japanese page) 
(in English) We propose a novel structure to boost the breakdown voltages of AlGaN/GaN hetero junction field effect transistors (HFETs) by widening a depletion layer in Si substrate. This utilizes ion implantation to selectively form heavily-doped p-type region at the peripheral area of the chip, which terminate the leakage current from the inversion layers at AlN/Si. The off-state breakdown voltage of the HFETs is increased up to 2200V by this Blocking-Voltage-Boosting (BVB) technology from 400V without the channel stoppers for the epitaxial GaN as thin as 1.9μm on Si. This technology greatly helps to increase the blocking voltage even for thin epitaxial GaN on Si.
Keyword (in Japanese) (See Japanese page) 
(in English) GaN / High breakdown voltage / Si substrate / Inversion layer / Depletion layer / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 358, ED2010-184, pp. 51-54, Jan. 2011.
Paper # ED2010-184 
Date of Issue 2011-01-06 (ED, MW) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ED2010-184 MW2010-144

Conference Information
Committee MW ED  
Conference Date 2011-01-13 - 2011-01-14 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Compound Semiconductor IC and High-Speed, High-Frequency Devices/Microwave Technologies 
Paper Information
Registration To ED 
Conference Code 2011-01-MW-ED 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Boosting of Blocking Voltages in GaN Transistors by Widening Depletion Layer in Si Substrate 
Sub Title (in English)  
Keyword(1) GaN  
Keyword(2) High breakdown voltage  
Keyword(3) Si substrate  
Keyword(4) Inversion layer  
Keyword(5) Depletion layer  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Hidekazu Umeda  
1st Author's Affiliation Panasonic Corporation (Panasonic Co.)
2nd Author's Name Asamira Suzuki  
2nd Author's Affiliation Panasonic Corporation (Panasonic Co.)
3rd Author's Name Yoshiharu Anda  
3rd Author's Affiliation Panasonic Corporation (Panasonic Co.)
4th Author's Name Masahiro Ishida  
4th Author's Affiliation Panasonic Corporation (Panasonic Co.)
5th Author's Name Tetsuzo Ueda  
5th Author's Affiliation Panasonic Corporation (Panasonic Co.)
6th Author's Name Tsuyoshi Tanaka  
6th Author's Affiliation Panasonic Corporation (Panasonic Co.)
7th Author's Name Daisuke Ueda  
7th Author's Affiliation Panasonic Corporation (Panasonic Co.)
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Speaker Author-1 
Date Time 2011-01-14 10:35:00 
Presentation Time 25 minutes 
Registration for ED 
Paper # ED2010-184, MW2010-144 
Volume (vol) vol.110 
Number (no) no.358(ED), no.359(MW) 
Page pp.51-54 
#Pages 4 
Date of Issue 2011-01-06 (ED, MW) 

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