Paper Abstract and Keywords |
Presentation |
2011-02-23 16:30
A Study on Precise FinFET High Frequency Characteristic Evaluation Method Hideo Sakai (Keio Univ.), Shinichi Ouchi, Takashi Matsukawa, Kazuhiko Endo, Yongxun Liu, Junichi Tsukada, Yuki Ishikawa, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike, Kunihiro Sakamoto, Meishoku Masahara (AIST), Hiroki Ishikuro (Keio Univ.) ED2010-198 SDM2010-233 Link to ES Tech. Rep. Archives: ED2010-198 SDM2010-233 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In recent years, different research groups have been focusing on FinFET transistor research as an excellent replacement for MOSFET transistor. However, FinFET application in RF circuitry has yet made progress. The main reason of such situation is the difficulty of making a simulation model of the 3D FinFET architecture. The 3D architecture introduces parasitics which are far more complicated than the current planar MOSFET. Even for experienced analog designer, it is a big challenge to determine the precise parasitic values based on experience and calculation. Recognizing intrinsic FinFET characteristics is necessary to establish an accurate high-frequency simulation model. On the other hand, experimental measurement of the FinFET’s intrinsic parts is difficult. Currently, the fabricated Fin Channels of the FinFET are smaller in comparison to area used to set up the contact holes in FinFET, thus introducing large parasitic around gate, drain, and source. Furthermore, parasitics introduced by gate, drain and source are much more dominant than parasitics of the intrinsic part, making it impossible to extract the FinFET’s Intrinsic characteristic during conventional frequency characteristic measurement. Due to the reason stated before, a highly accurate FinFET simulation model which is important for RF circuit design cannot be developed.
In this work, calibration patterns which can set the reference surface just beside the intrinsic Fin channel is proposed for precise extraction of FinFET’s intrinsic part, and its experimental measurement is done. Furthermore, AIST’s XMOS based simulation result and the extracted intrinsic part characteristic is compared, and its suitability for RF circuit design is discussed. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
FinFET / XMOS / AIST / S-parameter / RF Circuit / / / |
Reference Info. |
IEICE Tech. Rep., vol. 110, no. 424, SDM2010-233, pp. 37-42, Feb. 2011. |
Paper # |
SDM2010-233 |
Date of Issue |
2011-02-16 (ED, SDM) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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ED2010-198 SDM2010-233 Link to ES Tech. Rep. Archives: ED2010-198 SDM2010-233 |
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