| Paper Abstract and Keywords |
| Presentation |
2011-06-24 14:40
[Invited Talk]
International Conference Report - VTS2011(29th IEEE VLSI Test Symposium) Kazumi Hatayama (NAIST) DC2011-11 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
This talk provide a report of VTS2011 (29th IEEE VLSI Test Symposium), which was held in Dana Point, California, USA, in May, 2011. After showing the outline of VTS and VTS2011, the trend of paper topic area is given. Then the summaries of keynote speech and invited talks are followed by detailed reports on noticeable papers in the areas of silicon debug, utilization of on-chip sensors, low power test and design for testability. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
silicon debug / on-chip sensor / low power test / design for testability / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 111, no. 100, DC2011-11, pp. 17-22, June 2011. |
| Paper # |
DC2011-11 |
| Date of Issue |
2011-06-17 (DC) |
| ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Notes on Review |
This article is a technical report without peer review, and its polished version will be published elsewhere. |
| Download PDF |
DC2011-11 |
| Conference Information |
| Committee |
DC |
| Conference Date |
2011-06-24 - 2011-06-24 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Design, Test, Verification |
| Paper Information |
| Registration To |
DC |
| Conference Code |
2011-06-DC |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
International Conference Report - VTS2011(29th IEEE VLSI Test Symposium) |
| Sub Title (in English) |
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silicon debug |
| Keyword(2) |
on-chip sensor |
| Keyword(3) |
low power test |
| Keyword(4) |
design for testability |
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| 1st Author's Name |
Kazumi Hatayama |
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Nara Institute of Science and Technology (NAIST) |
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| Speaker |
Author-1 |
| Date Time |
2011-06-24 14:40:00 |
| Presentation Time |
60 minutes |
| Registration for |
DC |
| Paper # |
DC2011-11 |
| Volume (vol) |
vol.111 |
| Number (no) |
no.100 |
| Page |
pp.17-22 |
| #Pages |
6 |
| Date of Issue |
2011-06-17 (DC) |