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| Presentation | 2012-01-26 12:40 Discussion of Performance Prediction Model for Symmetric Block Ciphers on CUDA Naoki Nishikawa, Keisuke Iwai, Takakazu Kurokawa (NDA)  VLD2011-112 CPSY2011-75 RECONF2011-71 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | As the data protection with encryption becomes important day by day, the encryption processing using GPGPU has been noticed as one of the mothods to realize high-speed data protection technology. On the other hand, block ciphers in widespeaded use are not a single but so many algorithms. Therefore, in the case of implementation of these ciphers, programmers are forced to experiment repetitively to seek the best solution. Fortunately, in recent days, the reserach about implementation of symmetric block ciphers on CUDA has been popular, and then the effective implementation method have been established. The algorighm of symmetric block ciphers are consisted of such simple factors as table accesses, or integer or logical operations. Therefore, the performance of each symmetric block cipher on CUDA might be predictable if the culculation times of these factors are previously obtained. This paper presents the feasibility of performance predication model of symmetric block ciphers on CUDA. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | GPGPU / CUDA / Symmetric Block Cipher / Performance prediction / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 111, no. 398, CPSY2011-75, pp. 123-128, Jan. 2012. | |
| Paper # | CPSY2011-75 | |
| Date of Issue | 2012-01-18 (VLD, CPSY, RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2011-112 CPSY2011-75 RECONF2011-71 |
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| Conference Information | |
| Committee | VLD CPSY RECONF IPSJ-SLDM |
| Conference Date | 2012-01-25 - 2012-01-26 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc |
| Paper Information | |
| Registration To | CPSY |
| Conference Code | 2012-01-VLD-CPSY-RECONF-SLDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Discussion of Performance Prediction Model for Symmetric Block Ciphers on CUDA |
| Sub Title (in English) | |
| Keyword(1) | GPGPU |
| Keyword(2) | CUDA |
| Keyword(3) | Symmetric Block Cipher |
| Keyword(4) | Performance prediction |
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| 1st Author's Name | Naoki Nishikawa |
| 1st Author's Affiliation | National Defense Academy (NDA) |
| 2nd Author's Name | Keisuke Iwai |
| 2nd Author's Affiliation | National Defense Academy (NDA) |
| 3rd Author's Name | Takakazu Kurokawa |
| 3rd Author's Affiliation | National Defense Academy (NDA) |
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| Speaker | Author-1 |
| Date Time | 2012-01-26 12:40:00 |
| Presentation Time | 25 minutes |
| Registration for | CPSY |
| Paper # | VLD2011-112, CPSY2011-75, RECONF2011-71 |
| Volume (vol) | vol.111 |
| Number (no) | no.397(VLD), no.398(CPSY), no.399(RECONF) |
| Page | pp.123-128 |
| #Pages | 6 |
| Date of Issue | 2012-01-18 (VLD, CPSY, RECONF) |
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