Information: Join today and make your research activities more affordable! Technical workshop participation fees and annual registration fees are available at member rates.
Notice: [Important] Announcement of Changes to Registration Fee Payment and Manuscript Upload Procedures for IEICE Technical Meetings
IEICE Technical Committee Submission System
Conference Paper's Information		 Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2012-04-20 15:10
Integrated evaluation of on-board and on-chip power noise measurement results in digital LSI
Kumpei Yoshikawa, Yuta Sasaki (Kobe Univ.), Kouji Ichikawa (DENSO), Makoto Nagata (Kobe Univ.) EMCJ2012-7
Abstract (in Japanese) (See Japanese page) 
(in English) In recent LSI system designs, noise environment of LSI system is getting worse.
Therefore proper noise oriented design is required for fulfilling the EMC regulation .
To achieve the lower production cost, and shorter time to market,
power noise countermeasure in early design phase is essential.
This paper proposes an evaluation method and LSI-package-board co-simulation model of on-chip and on-board power noise in CMOS digital circuit.
On-chip power noise is measured by on-chip monitor circuit, and on-board power noise is measured by using a Magnetic probe.
Comparing the on-chip and on-board power noise measurement results and simulated results,
we can get the accurate framework of LSI-package-board co-design.
Keyword (in Japanese) (See Japanese page) 
(in English) power noise / noise simulation / Magnetic Probe / EMC / co-design / / /  
Reference Info. IEICE Tech. Rep., vol. 112, no. 12, EMCJ2012-7, pp. 37-42, April 2012.
Paper # EMCJ2012-7 
Date of Issue 2012-04-13 (EMCJ) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF EMCJ2012-7

Conference Information
Committee EMCJ  
Conference Date 2012-04-20 - 2012-04-20 
Place (in Japanese) (See Japanese page) 
Place (in English) Kanazawa Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To EMCJ 
Conference Code 2012-04-EMCJ 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Integrated evaluation of on-board and on-chip power noise measurement results in digital LSI 
Sub Title (in English)  
Keyword(1) power noise  
Keyword(2) noise simulation  
Keyword(3) Magnetic Probe  
Keyword(4) EMC  
Keyword(5) co-design  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Kumpei Yoshikawa  
1st Author's Affiliation Kobe University (Kobe Univ.)
2nd Author's Name Yuta Sasaki  
2nd Author's Affiliation Kobe University (Kobe Univ.)
3rd Author's Name Kouji Ichikawa  
3rd Author's Affiliation DENSO CORPORATION (DENSO)
4th Author's Name Makoto Nagata  
4th Author's Affiliation Kobe University (Kobe Univ.)
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
21st Author's Name  
21st Author's Affiliation ()
22nd Author's Name  
22nd Author's Affiliation ()
23rd Author's Name  
23rd Author's Affiliation ()
24th Author's Name  
24th Author's Affiliation ()
25th Author's Name  
25th Author's Affiliation ()
26th Author's Name / /
26th Author's Affiliation ()
()
27th Author's Name / /
27th Author's Affiliation ()
()
28th Author's Name / /
28th Author's Affiliation ()
()
29th Author's Name / /
29th Author's Affiliation ()
()
30th Author's Name / /
30th Author's Affiliation ()
()
31st Author's Name / /
31st Author's Affiliation ()
()
32nd Author's Name / /
32nd Author's Affiliation ()
()
33rd Author's Name / /
33rd Author's Affiliation ()
()
34th Author's Name / /
34th Author's Affiliation ()
()
35th Author's Name / /
35th Author's Affiliation ()
()
36th Author's Name / /
36th Author's Affiliation ()
()
Speaker Author-1 
Date Time 2012-04-20 15:10:00 
Presentation Time 25 minutes 
Registration for EMCJ 
Paper # EMCJ2012-7 
Volume (vol) vol.112 
Number (no) no.12 
Page pp.37-42 
#Pages 6 
Date of Issue 2012-04-13 (EMCJ) 

[Return to Top Page]

[Return to IEICE Web Page]
The Institute of Electronics, Information and Communication Engineers (IEICE), Japan