Information: Join today and make your research activities more affordable! Technical workshop participation fees and annual registration fees are available at member rates.
Notice: [Important] Announcement of Changes to Registration Fee Payment and Manuscript Upload Procedures for IEICE Technical Meetings
IEICE Technical Committee Submission System
Conference Paper's Information		 Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2012-07-19 11:10
SFQ Bit-Slice Floating Point Adder
Yukio Ohmomo, Yohei Naruse (Kyoto Univ.), Nobutaka Kito (Chukyo Univ.), Naofumi Takagi, Kazuyoshi Takagi (Kyoto Univ.) SCE2012-11
Abstract (in Japanese) (See Japanese page) 
(in English) Single Flux Quantum (SFQ) circuits operate at high-speed with low-power consumption.
A Large-Scale Reconfigurable Data Path (LSRDP) is proposed as an accelerator of a high-performance computer.
The previously proposed floating-point arithmetic units (FPUs) for SFQ-LSRDP are based on the bit-serial architecture.
For accomplishing an operation on long-bit data, bit-serial FPUs take a lot of clock cycles, and their throughputs are low.
In this report, we propose bit-slice floating-point adders (FPAs).
For a \(k\)-bit bit-slice FPA, we employ a radix-\(2^k\) floating-point number format.
Compared to the bit-serial FPA, a \(k\)-bit bit-slice FPA takes about \(1/k\) number clock cycles with slightly larger hardware, and its throughput is expected to be \(k\) times higher.
Keyword (in Japanese) (See Japanese page) 
(in English) SFQ Circuit / Floating Point Adder / Bit-Slice / / / / /  
Reference Info. IEICE Tech. Rep., vol. 112, no. 138, SCE2012-11, pp. 13-17, July 2012.
Paper # SCE2012-11 
Date of Issue 2012-07-12 (SCE) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SCE2012-11

Conference Information
Committee SCE  
Conference Date 2012-07-19 - 2012-07-19 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Signal processing technologies and their applications, etc. 
Paper Information
Registration To SCE 
Conference Code 2012-07-SCE 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) SFQ Bit-Slice Floating Point Adder 
Sub Title (in English)  
Keyword(1) SFQ Circuit  
Keyword(2) Floating Point Adder  
Keyword(3) Bit-Slice  
Keyword(4)  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Yukio Ohmomo  
1st Author's Affiliation Kyoto University (Kyoto Univ.)
2nd Author's Name Yohei Naruse  
2nd Author's Affiliation Kyoto University (Kyoto Univ.)
3rd Author's Name Nobutaka Kito  
3rd Author's Affiliation Chukyo University (Chukyo Univ.)
4th Author's Name Naofumi Takagi  
4th Author's Affiliation Kyoto University (Kyoto Univ.)
5th Author's Name Kazuyoshi Takagi  
5th Author's Affiliation Kyoto University (Kyoto Univ.)
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
21st Author's Name  
21st Author's Affiliation ()
22nd Author's Name  
22nd Author's Affiliation ()
23rd Author's Name  
23rd Author's Affiliation ()
24th Author's Name  
24th Author's Affiliation ()
25th Author's Name  
25th Author's Affiliation ()
26th Author's Name / /
26th Author's Affiliation ()
()
27th Author's Name / /
27th Author's Affiliation ()
()
28th Author's Name / /
28th Author's Affiliation ()
()
29th Author's Name / /
29th Author's Affiliation ()
()
30th Author's Name / /
30th Author's Affiliation ()
()
31st Author's Name / /
31st Author's Affiliation ()
()
32nd Author's Name / /
32nd Author's Affiliation ()
()
33rd Author's Name / /
33rd Author's Affiliation ()
()
34th Author's Name / /
34th Author's Affiliation ()
()
35th Author's Name / /
35th Author's Affiliation ()
()
36th Author's Name / /
36th Author's Affiliation ()
()
Speaker Author-1 
Date Time 2012-07-19 11:10:00 
Presentation Time 25 minutes 
Registration for SCE 
Paper # SCE2012-11 
Volume (vol) vol.112 
Number (no) no.138 
Page pp.13-17 
#Pages 5 
Date of Issue 2012-07-12 (SCE) 

[Return to Top Page]

[Return to IEICE Web Page]
The Institute of Electronics, Information and Communication Engineers (IEICE), Japan