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Paper Abstract and Keywords
Presentation 2012-09-28 09:35
Multi-Stage BCH -- An extension of BCH code for NAND flash memory --
Osamu Torii (Toshiba) IT2012-37
Abstract (in Japanese) (See Japanese page) 
(in English) Multi-Stage BCH is an extension of BCH code for NAND flash memory, and has 2 error correction stages. For small scale errors which occur frequently, high speed 1st error correction stage is applied, and for occasional large scale errors, high capable 2nd error correction stage is applied. As a result both high speed and high capable error correction are realized.
Keyword (in Japanese) (See Japanese page) 
(in English) BCH / NAND flash memory / Error Correction Code / Multi-Stage / / / /  
Reference Info. IEICE Tech. Rep., vol. 112, no. 215, IT2012-37, pp. 37-40, Sept. 2012.
Paper # IT2012-37 
Date of Issue 2012-09-20 (IT) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF IT2012-37

Conference Information
Committee IT  
Conference Date 2012-09-27 - 2012-09-28 
Place (in Japanese) (See Japanese page) 
Place (in English) Kusatsu Seminar House 
Topics (in Japanese) (See Japanese page) 
Topics (in English) error correcting codes, general 
Paper Information
Registration To IT 
Conference Code 2012-09-IT 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Multi-Stage BCH 
Sub Title (in English) An extension of BCH code for NAND flash memory 
Keyword(1) BCH  
Keyword(2) NAND flash memory  
Keyword(3) Error Correction Code  
Keyword(4) Multi-Stage  
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1st Author's Name Osamu Torii  
1st Author's Affiliation Toshiba Corporation (Toshiba)
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Speaker Author-1 
Date Time 2012-09-28 09:35:00 
Presentation Time 25 minutes 
Registration for IT 
Paper # IT2012-37 
Volume (vol) vol.112 
Number (no) no.215 
Page pp.37-40 
#Pages 4 
Date of Issue 2012-09-20 (IT) 

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