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Paper Abstract and Keywords
Presentation 2012-12-14 16:00
A Test Generation Model for Over-testing Alleviation and Its Application to Testing Based on Fault Acceptability
Masaaki Sakurada, Hideyuki Ichihara, Tsuyoshi Iwagaki, Tomoo Inoue (HCU) DC2012-77
Abstract (in Japanese) (See Japanese page) 
(in English) Over-testing, which is to judge fault-free chips as faulty ones, is a cause of the decrease in the effective yield of chips. In this paper, we propose a test generation model, called selective test generation model, in order to alleviate over-testing. Using this model with a general test generation algorithm can generate test patterns that not only detect target faults but also do not detect faults to be avoided being detected. Moreover, we discuss an application of this model to testing based on fault acceptability, which is defied according to error rate. We formulate two test generation problems for acceptable faults and give an approximate algorithm employing the proposed model to solve one of them.
Keyword (in Japanese) (See Japanese page) 
(in English) Over-testing / acceptable faults / test generation / error rate / transformation / test generation model / /  
Reference Info. IEICE Tech. Rep., vol. 112, no. 362, DC2012-77, pp. 21-26, Dec. 2012.
Paper # DC2012-77 
Date of Issue 2012-12-07 (DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee DC  
Conference Date 2012-12-14 - 2012-12-14 
Place (in Japanese) (See Japanese page) 
Place (in English) Aossa (Fukui) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Safety, etc. 
Paper Information
Registration To DC 
Conference Code 2012-12-DC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Test Generation Model for Over-testing Alleviation and Its Application to Testing Based on Fault Acceptability 
Sub Title (in English)  
Keyword(1) Over-testing  
Keyword(2) acceptable faults  
Keyword(3) test generation  
Keyword(4) error rate  
Keyword(5) transformation  
Keyword(6) test generation model  
1st Author's Name Masaaki Sakurada  
1st Author's Affiliation HIroshima City University (HCU)
2nd Author's Name Hideyuki Ichihara  
2nd Author's Affiliation HIroshima City University (HCU)
3rd Author's Name Tsuyoshi Iwagaki  
3rd Author's Affiliation HIroshima City University (HCU)
4th Author's Name Tomoo Inoue  
4th Author's Affiliation HIroshima City University (HCU)
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Speaker Author-1 
Date Time 2012-12-14 16:00:00 
Presentation Time 30 minutes 
Registration for DC 
Paper # DC2012-77 
Volume (vol) vol.112 
Number (no) no.362 
Page pp.21-26 
Date of Issue 2012-12-07 (DC) 

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