| Paper Abstract and Keywords |
| Presentation |
2013-04-12 10:20
[Invited Talk]
Unified Solid-State-Storage Architecture with NAND Flash Memory and ReRAM that Tolerates 32× Higher BER for Big-Data Applications Shuhei Tanakamaru (Chuo Univ./Univ. of Tokyo), Masafumi Doi, Ken Takeuchi (Chuo Univ.) ICD2013-14 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
Unified solid-state storage (USSS) with hybrid NAND flash memory / ReRAM provides high system-level data protection. Four highly reliable techniques, reverse-mirroring (RM), error-reduction synthesis (ERS), page-RAID, and error-masking (EM) are proposed in the unified storage controller. RM and EM are the mirroring techniques. These technologies utilize NAND error patterns asymmetries. Moreover fast, page-rewritable, and high endurance ReRAM is effectively used for temporary storage. As a result, the acceptable raw BER of NAND increases by 32-times, or endurance or data retention time of NAND is increased by 4.2 or 34-times, respectively, by applying all of the proposed techniques. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
Storage / Big-data / Reliability / ReRAM / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 113, no. 1, ICD2013-14, pp. 67-72, April 2013. |
| Paper # |
ICD2013-14 |
| Date of Issue |
2013-04-04 (ICD) |
| ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
ICD2013-14 |
| Conference Information |
| Committee |
ICD |
| Conference Date |
2013-04-11 - 2013-04-12 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Advanced Industrial Science and Technology (AIST) |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Memory Device Technologies |
| Paper Information |
| Registration To |
ICD |
| Conference Code |
2013-04-ICD |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
Unified Solid-State-Storage Architecture with NAND Flash Memory and ReRAM that Tolerates 32× Higher BER for Big-Data Applications |
| Sub Title (in English) |
|
| Keyword(1) |
Storage |
| Keyword(2) |
Big-data |
| Keyword(3) |
Reliability |
| Keyword(4) |
ReRAM |
| Keyword(5) |
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| Keyword(6) |
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| 1st Author's Name |
Shuhei Tanakamaru |
| 1st Author's Affiliation |
Chuo University/University of Tokyo (Chuo Univ./Univ. of Tokyo) |
| 2nd Author's Name |
Masafumi Doi |
| 2nd Author's Affiliation |
Chuo University (Chuo Univ.) |
| 3rd Author's Name |
Ken Takeuchi |
| 3rd Author's Affiliation |
Chuo University (Chuo Univ.) |
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| Speaker |
Author-1 |
| Date Time |
2013-04-12 10:20:00 |
| Presentation Time |
50 minutes |
| Registration for |
ICD |
| Paper # |
ICD2013-14 |
| Volume (vol) |
vol.113 |
| Number (no) |
no.1 |
| Page |
pp.67-72 |
| #Pages |
6 |
| Date of Issue |
2013-04-04 (ICD) |