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Paper Abstract and Keywords
Presentation 2013-05-16 09:00
Performance-driven SRAM Macro Design with Parameterized Cell Considering Layout-dependent Effects
Yu Zhang, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2013-1
Abstract (in Japanese) (See Japanese page) 
(in English) In nano-scale process, shallow trench isolation (STI) stress and well
proximity effect (WPE) affect the threshold voltage of MOSFET
as well as the performance of the system-on-chips (Soc).
As one of the most sensitive and highest density circuit, SRAMs must be
designed considering the stress effect analysis.
The variation of the stress effect causes dramatical change of the
threshold voltage especially beyond 90nm process.
In this paper, we present an SRAM macro design methodology dealing with
a significant trade-off among area, leakage power and delay by
introducing non-uniform parameterized SRAM cells.
Keyword (in Japanese) (See Japanese page) 
(in English) SRAM / STI / WPE / leakage power / delay / area / threshold voltage /  
Reference Info. IEICE Tech. Rep., vol. 113, no. 30, VLD2013-1, pp. 1-6, May 2013.
Paper # VLD2013-1 
Date of Issue 2013-05-09 (VLD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2013-1

Conference Information
Committee VLD IPSJ-SLDM  
Conference Date 2013-05-16 - 2013-05-16 
Place (in Japanese) (See Japanese page) 
Place (in English) Kitakyushu International Conference Center 
Topics (in Japanese) (See Japanese page) 
Topics (in English) System Design, etc. 
Paper Information
Registration To VLD 
Conference Code 2013-05-VLD-SLDM 
Language English (Japanese title is available) 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Performance-driven SRAM Macro Design with Parameterized Cell Considering Layout-dependent Effects 
Sub Title (in English)  
Keyword(1) SRAM  
Keyword(2) STI  
Keyword(3) WPE  
Keyword(4) leakage power  
Keyword(5) delay  
Keyword(6) area  
Keyword(7) threshold voltage  
Keyword(8)  
1st Author's Name Yu Zhang  
1st Author's Affiliation The University of Kitakyushu (Univ. of Kitakyushu)
2nd Author's Name Shigetoshi Nakatake  
2nd Author's Affiliation The University of Kitakyushu (Univ. of Kitakyushu)
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Speaker Author-1 
Date Time 2013-05-16 09:00:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2013-1 
Volume (vol) vol.113 
Number (no) no.30 
Page pp.1-6 
#Pages 6 
Date of Issue 2013-05-09 (VLD) 

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