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Paper Abstract and Keywords
Presentation 2013-10-07 16:05
A 2.4x-Real-Time VLSI Processor for 60-kWord Continuous Speech Recognition
Guangji He, Yuki Miyamoto, Kumpei Matsuda, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ) VLD2013-52 ICD2013-76 IE2013-52
Abstract (in Japanese) (See Japanese page) 
(in English) This paper describes a low-power VLSI chip for speaker-independent 60-kWord continuous speech recognition based on a context-dependent Hidden Markov Model (HMM). We implement parallel and pipelined architecture for GMM computation and Viterbi processing. It includes a 8-path Viterbi transition architecture to maximize the processing speed and adopts tri-gram language model to improve the recognition accuracy. A two-level cache architecture is implemented for the demo system. The test chip, fabricated in 40 nm CMOS technology, occupies 1.77 mm × 2.18 mm containing 2.98 M transistors for logic and 4.29 Mbit on-chip memory. The measured results show that our implementation achieves 25% required frequency reduction (62.5 MHz) and 26% power consumption reduction (54.8 mW) for 60 k-Word real-time continuous speech recognition compared to the previous work. This chip can maximally process 3.02× and 2.25× times faster than real-time at 200 MHz using the bigram and trigram language models, respectively.
Keyword (in Japanese) (See Japanese page) 
(in English) 40nm VLSI / Hidden Markov Model (HMM) / large vocabulary continuous speech recognition (LVCSR) / / / / /  
Reference Info. IEICE Tech. Rep., vol. 113, no. 236, ICD2013-76, pp. 29-34, Oct. 2013.
Paper # ICD2013-76 
Date of Issue 2013-09-30 (VLD, ICD, IE) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2013-52 ICD2013-76 IE2013-52

Conference Information
Committee IE ICD VLD IPSJ-SLDM  
Conference Date 2013-10-07 - 2013-10-08 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ICD 
Conference Code 2013-10-IE-ICD-VLD-SLDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A 2.4x-Real-Time VLSI Processor for 60-kWord Continuous Speech Recognition 
Sub Title (in English)  
Keyword(1) 40nm VLSI  
Keyword(2) Hidden Markov Model (HMM)  
Keyword(3) large vocabulary continuous speech recognition (LVCSR)  
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1st Author's Name Guangji He  
1st Author's Affiliation Kobe University (Kobe Univ)
2nd Author's Name Yuki Miyamoto  
2nd Author's Affiliation Kobe University (Kobe Univ)
3rd Author's Name Kumpei Matsuda  
3rd Author's Affiliation Kobe University (Kobe Univ)
4th Author's Name Shintaro Izumi  
4th Author's Affiliation Kobe University (Kobe Univ)
5th Author's Name Hiroshi Kawaguchi  
5th Author's Affiliation Kobe University (Kobe Univ)
6th Author's Name Masahiko Yoshimoto  
6th Author's Affiliation Kobe University (Kobe Univ)
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Speaker Author-1 
Date Time 2013-10-07 16:05:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # VLD2013-52, ICD2013-76, IE2013-52 
Volume (vol) vol.113 
Number (no) no.235(VLD), no.236(ICD), no.237(IE) 
Page pp.29-34 
#Pages 6 
Date of Issue 2013-09-30 (VLD, ICD, IE) 

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