Paper Abstract and Keywords |
Presentation |
2013-11-08 09:20
Evaluation of a Dependable Interrupt Interface by Bundled Interrupt Request Lines Hayato Nomura (Toyohashi Univ. of Tech.), Hajime Shimada (Nagoya Univ.), Ryotaro Kobayashi (Toyohashi Univ. of Tech.) CPSY2013-40 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Conventional processors are exposed to not only on-chip transient faults caused by radiation and permanent failures due to electro-migration, but also off-chip transient faults caused by noise and the permanent failures due to solder cracks. In conventional microcontroller, soft/hard-error tolerance is almost not considered around inputs such as interrupt interface. When fault occurs in this portion, it causes unrecoverable processor state destruction. Therefore, we implemented the dependable interrupt interface that is based on redundant interrupt request lines and query to the client device. In addition, we evaluate the amount of binary footprint and the interrupt latency by the redundant configuration. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Dependability / Redundancy / Microcontroller / Interface / Interrupt / / / |
Reference Info. |
IEICE Tech. Rep., vol. 113, no. 282, CPSY2013-40, pp. 7-12, Nov. 2013. |
Paper # |
CPSY2013-40 |
Date of Issue |
2013-11-01 (CPSY) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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CPSY2013-40 |
Conference Information |
Committee |
CPSY |
Conference Date |
2013-11-08 - 2013-11-08 |
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(See Japanese page) |
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Paper Information |
Registration To |
CPSY |
Conference Code |
2013-11-CPSY |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Evaluation of a Dependable Interrupt Interface by Bundled Interrupt Request Lines |
Sub Title (in English) |
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Keyword(1) |
Dependability |
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Redundancy |
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Microcontroller |
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Interface |
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Interrupt |
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1st Author's Name |
Hayato Nomura |
1st Author's Affiliation |
Toyohashi University of Technology (Toyohashi Univ. of Tech.) |
2nd Author's Name |
Hajime Shimada |
2nd Author's Affiliation |
Nagoya University (Nagoya Univ.) |
3rd Author's Name |
Ryotaro Kobayashi |
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Toyohashi University of Technology (Toyohashi Univ. of Tech.) |
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Speaker |
Author-1 |
Date Time |
2013-11-08 09:20:00 |
Presentation Time |
20 minutes |
Registration for |
CPSY |
Paper # |
CPSY2013-40 |
Volume (vol) |
vol.113 |
Number (no) |
no.282 |
Page |
pp.7-12 |
#Pages |
6 |
Date of Issue |
2013-11-01 (CPSY) |
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