Paper Abstract and Keywords |
Presentation |
2013-11-28 08:55
System-level design method considering the interrupt processing Yuki Ando, Yukihito Ishida, Shinya Honda, Hiroaki Takada, Masato Edahiro (Nagoya Univ.) VLD2013-77 DC2013-43 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
We propose a system level design methodology for control systems that have both input and output by abstraction of interrupt handling. Since control systems are increasing their complexity, the designers have to design them on higher level of abstraction to increase design efficiency. System level design is known as one of the way to realize that. However, they cannot handle control systems because they do not consider interrupt handling. We propose a model that deals with control systems at system level by abstraction of interrupt handling. The case study shows that our proposing model has few overhead on memory usage and execution time. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
system level design / interrupt process / control system / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 113, no. 320, VLD2013-77, pp. 119-124, Nov. 2013. |
Paper # |
VLD2013-77 |
Date of Issue |
2013-11-20 (VLD, DC) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2013-77 DC2013-43 |
Conference Information |
Committee |
VLD DC IPSJ-SLDM CPSY RECONF ICD CPM |
Conference Date |
2013-11-27 - 2013-11-29 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
|
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Gaia 2013 -New Field of VLSI Design- |
Paper Information |
Registration To |
VLD |
Conference Code |
2013-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
System-level design method considering the interrupt processing |
Sub Title (in English) |
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Keyword(1) |
system level design |
Keyword(2) |
interrupt process |
Keyword(3) |
control system |
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1st Author's Name |
Yuki Ando |
1st Author's Affiliation |
Nagoya University (Nagoya Univ.) |
2nd Author's Name |
Yukihito Ishida |
2nd Author's Affiliation |
Nagoya University (Nagoya Univ.) |
3rd Author's Name |
Shinya Honda |
3rd Author's Affiliation |
Nagoya University (Nagoya Univ.) |
4th Author's Name |
Hiroaki Takada |
4th Author's Affiliation |
Nagoya University (Nagoya Univ.) |
5th Author's Name |
Masato Edahiro |
5th Author's Affiliation |
Nagoya University (Nagoya Univ.) |
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Speaker |
Author-1 |
Date Time |
2013-11-28 08:55:00 |
Presentation Time |
25 minutes |
Registration for |
VLD |
Paper # |
VLD2013-77, DC2013-43 |
Volume (vol) |
vol.113 |
Number (no) |
no.320(VLD), no.321(DC) |
Page |
pp.119-124 |
#Pages |
6 |
Date of Issue |
2013-11-20 (VLD, DC) |
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