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Paper Abstract and Keywords
Presentation 2014-01-16 11:45
Depletion-mode gallium oxide metal-oxide-semiconductor field-effect transistors fabricated by using Si-ion implantation
Masataka Higashiwaki (NICT), Kohei Sasaki (Tamura/NICT), Man Hoi Wong, Takafumi Kamimura, Daivasigamani Krishnamurthy (NICT), Akito Kuramata (Tamura), Takekazu Masui (Koha), Shigenobu Yamakoshi (Tamura) ED2013-116 MW2013-181
Abstract (in Japanese) (See Japanese page) 
(in English) Depletion-mode gallium oxide (Ga2O3) MOSFETs were fabricated on single-crystal beta-Ga2O3 (010) substrates. We applied Si-ion implantation to the ohmic contacts for low contact resistance as well as to the channel layer for reliable doping. An Al2O3 gate dielectric film formed by atomic layer deposition passivated the device surface and significantly reduced gate leakage. The MOSFETs with a simple structure exhibited complete channel pinch-off with a breakdown voltage of 415 V and a drain current on/off ratio of ten orders of magnitude at room temperature. The devices also showed stable operation up to 250C.
Keyword (in Japanese) (See Japanese page) 
(in English) gallium oxide (Ga2O3) / metal-oxide-semiconductor field-effect transistor (MOSFET) / depletion mode / ion implantation / / / /  
Reference Info. IEICE Tech. Rep., vol. 113, no. 378, ED2013-116, pp. 35-39, Jan. 2014.
Paper # ED2013-116 
Date of Issue 2014-01-09 (ED, MW) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ED2013-116 MW2013-181

Conference Information
Committee ED MW  
Conference Date 2014-01-16 - 2014-01-17 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Power devices, High-speed and high-frequency devices, Microwave Technologies, etc. 
Paper Information
Registration To ED 
Conference Code 2014-01-ED-MW 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Depletion-mode gallium oxide metal-oxide-semiconductor field-effect transistors fabricated by using Si-ion implantation 
Sub Title (in English)  
Keyword(1) gallium oxide (Ga2O3)  
Keyword(2) metal-oxide-semiconductor field-effect transistor (MOSFET)  
Keyword(3) depletion mode  
Keyword(4) ion implantation  
Keyword(5)  
Keyword(6)  
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Keyword(8)  
1st Author's Name Masataka Higashiwaki  
1st Author's Affiliation National Institute of Information and Communications Technology (NICT)
2nd Author's Name Kohei Sasaki  
2nd Author's Affiliation Tamura Corporation/National Institute of Information and Communications Technology (Tamura/NICT)
3rd Author's Name Man Hoi Wong  
3rd Author's Affiliation National Institute of Information and Communications Technology (NICT)
4th Author's Name Takafumi Kamimura  
4th Author's Affiliation National Institute of Information and Communications Technology (NICT)
5th Author's Name Daivasigamani Krishnamurthy  
5th Author's Affiliation National Institute of Information and Communications Technology (NICT)
6th Author's Name Akito Kuramata  
6th Author's Affiliation Tamura Corporation (Tamura)
7th Author's Name Takekazu Masui  
7th Author's Affiliation Koha Co., Ltd. (Koha)
8th Author's Name Shigenobu Yamakoshi  
8th Author's Affiliation Tamura Corporation (Tamura)
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Speaker Author-1 
Date Time 2014-01-16 11:45:00 
Presentation Time 25 minutes 
Registration for ED 
Paper # ED2013-116, MW2013-181 
Volume (vol) vol.113 
Number (no) no.378(ED), no.379(MW) 
Page pp.35-39 
#Pages 5 
Date of Issue 2014-01-09 (ED, MW) 

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