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Paper Abstract and Keywords
Presentation 2014-01-21 15:00
A prototype switched-current chaotic neuron integrated circuit for the parallel updating chaotic tabu search hardware system
Akihito Toyoda, Syu Tanaka, Yoshihiko Horio (Tokyo Denki Univ.), Kazuyuki Aihara (Univ. of Tokyo) NLP2013-140
Abstract (in Japanese) (See Japanese page) 
(in English) An exponential chaotic tabu search, in which the tabu search is driven by chaotic neurodynamics, has been proposed and applied to combinatorial optimization problems.
However, the hardware cost of the synchronous updating exponential chaotic tabu search increases as the size of the problem increases.
Therefore, several modifications such as synchronous and parallel updatings of the neuronal states have been introduced in the exponential chaotic tabu search for efficient implementation with analog/digital hybrid hardware systems.
In this paper, we design the chaotic neuron circuit suitable for hardware implementation with the analog inverter-based switched-current (SI) circuit technique.
Moreover, we implement the SI chaotic neuron circuit with TSMC 0.18um CMOS process.
The fabricated circuit can control the decay parameter kr in 8 steps.
By adjusting the value of kr, we can solve any type of problems through the hardware system.
From measurement results, we confirm effectiveness of the fabricated SI chaotic neuron integrated circuit.
Keyword (in Japanese) (See Japanese page) 
(in English) combinatorial optimization problem / quadratic assignment problem / chaotic taboo search / chaotic neural network / / / /  
Reference Info. IEICE Tech. Rep., vol. 113, no. 383, NLP2013-140, pp. 63-66, Jan. 2014.
Paper # NLP2013-140 
Date of Issue 2014-01-14 (NLP) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF NLP2013-140

Conference Information
Committee NLP  
Conference Date 2014-01-21 - 2014-01-22 
Place (in Japanese) (See Japanese page) 
Place (in English) Niseko Park Hotel 
Topics (in Japanese) (See Japanese page) 
Topics (in English) General 
Paper Information
Registration To NLP 
Conference Code 2014-01-NLP 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A prototype switched-current chaotic neuron integrated circuit for the parallel updating chaotic tabu search hardware system 
Sub Title (in English)  
Keyword(1) combinatorial optimization problem  
Keyword(2) quadratic assignment problem  
Keyword(3) chaotic taboo search  
Keyword(4) chaotic neural network  
Keyword(5)  
Keyword(6)  
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1st Author's Name Akihito Toyoda  
1st Author's Affiliation Tokyo Denki University (Tokyo Denki Univ.)
2nd Author's Name Syu Tanaka  
2nd Author's Affiliation Tokyo Denki University (Tokyo Denki Univ.)
3rd Author's Name Yoshihiko Horio  
3rd Author's Affiliation Tokyo Denki University (Tokyo Denki Univ.)
4th Author's Name Kazuyuki Aihara  
4th Author's Affiliation The University of Tokyo (Univ. of Tokyo)
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Speaker Author-1 
Date Time 2014-01-21 15:00:00 
Presentation Time 20 minutes 
Registration for NLP 
Paper # NLP2013-140 
Volume (vol) vol.113 
Number (no) no.383 
Page pp.63-66 
#Pages 4 
Date of Issue 2014-01-14 (NLP) 

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