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Paper Abstract and Keywords
Presentation 2014-04-18 09:55
[Invited Lecture] Ultralow-Voltage Operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM Down to 0.37 V Utilizing Adaptive Back Bias
Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Nobuyuki Sugii, Yasuo Yamaguchi (LEAP), Tomoko Mizutani, Toshiro Hiramoto (UTokyo) ICD2014-11
Abstract (in Japanese) (See Japanese page) 
(in English) We demonstrated record 0.37V minimum operation voltage (VMIN) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks to the small variability of SOTB (AVT~1.3 mVμm) and adaptive back biasing (ABB), VMIN was lowered down to ~0.4 V regardless of temperature. Both fast access time and small standby leakage were achieved by ABB.
Keyword (in Japanese) (See Japanese page) 
(in English) Silicon-on-Thin-Buried-oxide (SOTB) / SRAM / Low Voltage Operation / Low Standby Leakage / / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 13, ICD2014-11, pp. 53-57, April 2014.
Paper # ICD2014-11 
Date of Issue 2014-04-10 (ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee ICD  
Conference Date 2014-04-17 - 2014-04-18 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Memory Device Technologies 
Paper Information
Registration To ICD 
Conference Code 2014-04-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Ultralow-Voltage Operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM Down to 0.37 V Utilizing Adaptive Back Bias 
Sub Title (in English)  
Keyword(1) Silicon-on-Thin-Buried-oxide (SOTB)  
Keyword(2) SRAM  
Keyword(3) Low Voltage Operation  
Keyword(4) Low Standby Leakage  
Keyword(5)  
Keyword(6)  
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Keyword(8)  
1st Author's Name Yoshiki Yamamoto  
1st Author's Affiliation Low-power Electronics Association & Project (LEAP)
2nd Author's Name Hideki Makiyama  
2nd Author's Affiliation Low-power Electronics Association & Project (LEAP)
3rd Author's Name Tomohiro Yamashita  
3rd Author's Affiliation Low-power Electronics Association & Project (LEAP)
4th Author's Name Hidekazu Oda  
4th Author's Affiliation Low-power Electronics Association & Project (LEAP)
5th Author's Name Shiro Kamohara  
5th Author's Affiliation Low-power Electronics Association & Project (LEAP)
6th Author's Name Nobuyuki Sugii  
6th Author's Affiliation Low-power Electronics Association & Project (LEAP)
7th Author's Name Yasuo Yamaguchi  
7th Author's Affiliation Low-power Electronics Association & Project (LEAP)
8th Author's Name Tomoko Mizutani  
8th Author's Affiliation The University of Tokyo (UTokyo)
9th Author's Name Toshiro Hiramoto  
9th Author's Affiliation The University of Tokyo (UTokyo)
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Speaker Author-1 
Date Time 2014-04-18 09:55:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # ICD2014-11 
Volume (vol) vol.114 
Number (no) no.13 
Page pp.53-57 
#Pages 5 
Date of Issue 2014-04-10 (ICD) 

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