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Paper Abstract and Keywords
Presentation 2014-06-30 16:25
Study on the hardware of the Bidirectional Associative Memories by using the Inverse Function Delayless model
Chunyu Bao, Takeshi Onomi, Yoshihiro Hayakawa, Shigeo Sato, Koji Nakajima (Tohoku Univ.) NLP2014-26
Abstract (in Japanese) (See Japanese page) 
(in English) In conventional macro models such as the Hopfield model, the problems that are caused by the solution of the network not to escape from a local minimum such as spurious memory has been known. As Inverse Function Delayless model, we proved that the problem can be avoided by realizing the destabilization due to acceleration region. Moreover, by allowing a discrete operation, the convergence speed of the network is sufficiently fast. In this study, We introduce the effect of IDL to the associative memory system of hetero associative type and analyse the performance of the neural network. It is proved that the the effects of the IDL can be fulfilled. In this system the Basin size is expanded and the speed of convergence time to the memory state is improved. Then, in order to utilize, we try to implement the BAM System with the IDL effect by FPGA.
Keyword (in Japanese) (See Japanese page) 
(in English) Neural network / IDL model / BAM system / FPGA / Associative memory / / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 113, NLP2014-26, pp. 31-36, June 2014.
Paper # NLP2014-26 
Date of Issue 2014-06-23 (NLP) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee NLP  
Conference Date 2014-06-30 - 2014-07-01 
Place (in Japanese) (See Japanese page) 
Place (in English) Tohoku Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Nonlinear Problems, etc. 
Paper Information
Registration To NLP 
Conference Code 2014-06-NLP 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Study on the hardware of the Bidirectional Associative Memories by using the Inverse Function Delayless model 
Sub Title (in English)  
Keyword(1) Neural network  
Keyword(2) IDL model  
Keyword(3) BAM system  
Keyword(4) FPGA  
Keyword(5) Associative memory  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Chunyu Bao  
1st Author's Affiliation Tohoku University (Tohoku Univ.)
2nd Author's Name Takeshi Onomi  
2nd Author's Affiliation Tohoku University (Tohoku Univ.)
3rd Author's Name Yoshihiro Hayakawa  
3rd Author's Affiliation Tohoku University (Tohoku Univ.)
4th Author's Name Shigeo Sato  
4th Author's Affiliation Tohoku University (Tohoku Univ.)
5th Author's Name Koji Nakajima  
5th Author's Affiliation Tohoku University (Tohoku Univ.)
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Speaker Author-1 
Date Time 2014-06-30 16:25:00 
Presentation Time 25 minutes 
Registration for NLP 
Paper # NLP2014-26 
Volume (vol) vol.114 
Number (no) no.113 
Page pp.31-36 
#Pages
Date of Issue 2014-06-23 (NLP) 


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