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Paper Abstract and Keywords
Presentation 2015-01-27 16:45
[Invited Talk] Experimental Realization of Complementary p- and n- Tunnel FinFETs with Subthreshold Slopes of Less than 60 mV/decade and Very Low (pA/um) Off-Current on a Si CMOS Platform
Yukinori Morita, Takahiro Mori, Koichi Fukuda, Wataru Mizubayashi, Shinji Migita, Takashi Matsukawa, Kazuhiko Endo, Shinichi O'uchi, Yongxun Liu, Meishoku Masahara, Hiroyuki Ota (AIST) SDM2014-146
Abstract (in Japanese) (See Japanese page) 
(in English) Complementary (p- and n-type) tunnel FinFETs operating with subthreshold slopes (SSs) of less than 60 mV/decade and very low off-currents (on the order of a few pA/µm) have been experimentally realized on the Si CMOS platform. Improvements in the SSs have been realized by optimizing epitaxial channel growth on heavily arsenic- and boron-doped source surfaces for purging interface defects at the epitaxial tunnel junctions.
Keyword (in Japanese) (See Japanese page) 
(in English) Tunnel FET / TFET / FinFET / Tunnel FinFET / Epitaxial growth / Steep-slope / /  
Reference Info. IEICE Tech. Rep., vol. 114, no. 421, SDM2014-146, pp. 45-48, Jan. 2015.
Paper # SDM2014-146 
Date of Issue 2015-01-20 (SDM) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee SDM  
Conference Date 2015-01-27 - 2015-01-27 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To SDM 
Conference Code 2015-01-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Experimental Realization of Complementary p- and n- Tunnel FinFETs with Subthreshold Slopes of Less than 60 mV/decade and Very Low (pA/um) Off-Current on a Si CMOS Platform 
Sub Title (in English)  
Keyword(1) Tunnel FET  
Keyword(2) TFET  
Keyword(3) FinFET  
Keyword(4) Tunnel FinFET  
Keyword(5) Epitaxial growth  
Keyword(6) Steep-slope  
Keyword(7)  
Keyword(8)  
1st Author's Name Yukinori Morita  
1st Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
2nd Author's Name Takahiro Mori  
2nd Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
3rd Author's Name Koichi Fukuda  
3rd Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
4th Author's Name Wataru Mizubayashi  
4th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
5th Author's Name Shinji Migita  
5th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
6th Author's Name Takashi Matsukawa  
6th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
7th Author's Name Kazuhiko Endo  
7th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
8th Author's Name Shinichi O'uchi  
8th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
9th Author's Name Yongxun Liu  
9th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
10th Author's Name Meishoku Masahara  
10th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
11th Author's Name Hiroyuki Ota  
11th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
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Speaker Author-1 
Date Time 2015-01-27 16:45:00 
Presentation Time 25 minutes 
Registration for SDM 
Paper # SDM2014-146 
Volume (vol) vol.114 
Number (no) no.421 
Page pp.45-48 
#Pages 4 
Date of Issue 2015-01-20 (SDM) 

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