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| Presentation | 2015-03-02 15:45 Studies on Representation of Stacked Rectangular Dissections for 3D-LSI Floorplan Kazufumi Kogai, Kunihiro Fujiyoshi (TUAT)  VLD2014-159 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | A stacked-rectangular-dissection, which consists of several rectangular-dissections, each of which is a rectangular area dissected into some small rectangular regions (rooms) by vertical/horizontal line segments and is often used as a floorplan of 2D-LSI, were proposed for floorplan of 3D-LSI considering a placement of through-silicon-vias (TSVs). However, conventional representation methods of stacked-rectangular-dissections have several problems, such as the length of a representation is indefinite even if the number of rooms and layers are given. In this paper, we propose a new representation, whose length is linear length of the number of rooms and layers, of stacked-rectangular-dissections. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Simulated Annealing / Rectangular Dissections / Stacked Rectangular Dissections / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 114, no. 476, VLD2014-159, pp. 37-41, March 2015. | |
| Paper # | VLD2014-159 | |
| Date of Issue | 2015-02-23 (VLD) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2014-159 |
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| Conference Information | |
| Committee | VLD |
| Conference Date | 2015-03-02 - 2015-03-04 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Okinawa Seinen Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2015-03-VLD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Studies on Representation of Stacked Rectangular Dissections for 3D-LSI Floorplan |
| Sub Title (in English) | |
| Keyword(1) | Simulated Annealing |
| Keyword(2) | Rectangular Dissections |
| Keyword(3) | Stacked Rectangular Dissections |
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| 1st Author's Name | Kazufumi Kogai |
| 1st Author's Affiliation | Tokyo University of Agriculture and Technology (TUAT) |
| 2nd Author's Name | Kunihiro Fujiyoshi |
| 2nd Author's Affiliation | Tokyo University of Agriculture and Technology (TUAT) |
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| Speaker | Author-1 |
| Date Time | 2015-03-02 15:45:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2014-159 |
| Volume (vol) | vol.114 |
| Number (no) | no.476 |
| Page | pp.37-41 |
| #Pages | 5 |
| Date of Issue | 2015-02-23 (VLD) |
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