| Paper Abstract and Keywords |
| Presentation |
2015-06-19 11:35
Evaluation of the third Flex Power FPGA chip in SOTB technology Masakazu Hioki, Yasuhiro Ogasahara, Hanpei Koike (AIST) RECONF2015-3 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
This paper reports the evaluation of the third Flex Power FPGA chip in SOTB technology. Fabricated chip aims to shrink an FPGA tile footprint. 2.25 times FPGA tiles can be integrated compared to previously fabricated chip by reducing design margins and by redesigning back bias circuits. Moreover, power reduction efficiency of fabricated chip is referred in case that a 32bit binary counter circuit is implemented. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
Silicon On Thin BOX / SOTB / Flex Power FPGA / FPGA / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 115, no. 109, RECONF2015-3, pp. 13-16, June 2015. |
| Paper # |
RECONF2015-3 |
| Date of Issue |
2015-06-12 (RECONF) |
| ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Notes on Review |
This article is a technical report without peer review, and its polished version will be published elsewhere. |
| Download PDF |
RECONF2015-3 |
| Conference Information |
| Committee |
RECONF |
| Conference Date |
2015-06-19 - 2015-06-20 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Kyoto University |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
the 10th anniversary celebration of RECONF: Reconfigurable Systems, etc. |
| Paper Information |
| Registration To |
RECONF |
| Conference Code |
2015-06-RECONF |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
Evaluation of the third Flex Power FPGA chip in SOTB technology |
| Sub Title (in English) |
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| Keyword(1) |
Silicon On Thin BOX |
| Keyword(2) |
SOTB |
| Keyword(3) |
Flex Power FPGA |
| Keyword(4) |
FPGA |
| Keyword(5) |
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| 1st Author's Name |
Masakazu Hioki |
| 1st Author's Affiliation |
National Institute of Advanced Industrial Science and Technology (AIST) |
| 2nd Author's Name |
Yasuhiro Ogasahara |
| 2nd Author's Affiliation |
National Institute of Advanced Industrial Science and Technology (AIST) |
| 3rd Author's Name |
Hanpei Koike |
| 3rd Author's Affiliation |
National Institute of Advanced Industrial Science and Technology (AIST) |
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| Speaker |
Author-1 |
| Date Time |
2015-06-19 11:35:00 |
| Presentation Time |
25 minutes |
| Registration for |
RECONF |
| Paper # |
RECONF2015-3 |
| Volume (vol) |
vol.115 |
| Number (no) |
no.109 |
| Page |
pp.13-16 |
| #Pages |
4 |
| Date of Issue |
2015-06-12 (RECONF) |