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Paper Abstract and Keywords
Presentation 2015-12-03 15:00
Easily-testable Carry Select Adder with Online Error Detection Capability
Nobutaka Kito (Chukyo Univ.) VLD2015-72 DC2015-68
Abstract (in Japanese) (See Japanese page) 
(in English) An easily testable multi-block carry select adder with online error detection capability is proposed. An easily testable carry select addition block is shown and its testability and error detection mechanism is discussed, and an easily testable multi-block carry select adder based on the addition block is proposed. The proposed multi-block adder is testable with 10 patterns independent of the bit-width of operands and the number of addition blocks. A test pattern generation method for the adder is shown. Any error of the adder caused by a single stuck-at fault can be detected by comparing the predicted parity of the adder result with the parity of the adder result and comparing the duplicated carry outputs.
Keyword (in Japanese) (See Japanese page) 
(in English) online error detection / carry select adder / design for testability / / / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 339, DC2015-68, pp. 225-230, Dec. 2015.
Paper # DC2015-68 
Date of Issue 2015-11-24 (VLD, DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2015-72 DC2015-68

Conference Information
Committee VLD DC IPSJ-SLDM CPSY RECONF ICD CPM  
Conference Date 2015-12-01 - 2015-12-03 
Place (in Japanese) (See Japanese page) 
Place (in English) Nagasaki Kinro Fukushi Kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2015 -New Field of VLSI Design- 
Paper Information
Registration To DC 
Conference Code 2015-12-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Easily-testable Carry Select Adder with Online Error Detection Capability 
Sub Title (in English)  
Keyword(1) online error detection  
Keyword(2) carry select adder  
Keyword(3) design for testability  
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1st Author's Name Nobutaka Kito  
1st Author's Affiliation Chukyo University (Chukyo Univ.)
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Speaker Author-1 
Date Time 2015-12-03 15:00:00 
Presentation Time 25 minutes 
Registration for DC 
Paper # VLD2015-72, DC2015-68 
Volume (vol) vol.115 
Number (no) no.338(VLD), no.339(DC) 
Page pp.225-230 
#Pages 6 
Date of Issue 2015-11-24 (VLD, DC) 

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