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| Presentation | 2016-02-29 15:00 High-Level Synthesis of Embedded Systems Controller from Erlang Hinata Takabeyashi, Nagisa Ishiura, Kagumi Azuma (Kwansei Gakuin Univ), Nobuaki Yoshida, Hiroyuki Kanbara (ASTEM)  VLD2015-114 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | This article presents a method of specifying the behavior of embedded systems' control by a subset of Erlang and synthesizing hardware from the specification. In this method, the systems' behavior is modeld so that events are processed by concurrent processes with message passing. Assembly codes of the BEAM virtual machine compiled from Erlang programs are converted into CDFGs (control dataflow graphs), which are synthesized into Verilog HDL by the backend of the high-level synthesizer ACAP. Complex routines to handle message passing and garbage collection are synthesized by the ACAP from reduced C implementation of the BEAM interpreter. A prototype system based on the proposed method implemented in Perl has successfuly synthesized a simple two-process Erlang description into logic-synthesizable Verilog codes. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | high-level synthesis / hardware/software codesign / embedded systems / Erlang / domain-specific language / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 115, no. 465, VLD2015-114, pp. 19-24, Feb. 2016. | |
| Paper # | VLD2015-114 | |
| Date of Issue | 2016-02-22 (VLD) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2015-114 |
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| Conference Information | |
| Committee | VLD |
| Conference Date | 2016-02-29 - 2016-03-02 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Okinawa Seinen Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2016-02-VLD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | High-Level Synthesis of Embedded Systems Controller from Erlang |
| Sub Title (in English) | |
| Keyword(1) | high-level synthesis |
| Keyword(2) | hardware/software codesign |
| Keyword(3) | embedded systems |
| Keyword(4) | Erlang |
| Keyword(5) | domain-specific language |
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| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Hinata Takabeyashi |
| 1st Author's Affiliation | Kwansei Gakuin University (Kwansei Gakuin Univ) |
| 2nd Author's Name | Nagisa Ishiura |
| 2nd Author's Affiliation | Kwansei Gakuin University (Kwansei Gakuin Univ) |
| 3rd Author's Name | Kagumi Azuma |
| 3rd Author's Affiliation | Kwansei Gakuin University (Kwansei Gakuin Univ) |
| 4th Author's Name | Nobuaki Yoshida |
| 4th Author's Affiliation | ASTEM RI/KYOTO (ASTEM) |
| 5th Author's Name | Hiroyuki Kanbara |
| 5th Author's Affiliation | ASTEM RI/KYOTO (ASTEM) |
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| Speaker | Author-1 |
| Date Time | 2016-02-29 15:00:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2015-114 |
| Volume (vol) | vol.115 |
| Number (no) | no.465 |
| Page | pp.19-24 |
| #Pages | 6 |
| Date of Issue | 2016-02-22 (VLD) |
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