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Paper Abstract and Keywords
Presentation 2016-06-10 10:45
FPGA implementation of Autoencoders for hw/sw complex system
Suzuki Akihiro, Morie Takashi, Tamukoh Hakaru (Kyutech) SIS2016-13
Abstract (in Japanese) (See Japanese page) 
(in English) In this report, we propose a digital circuit design of Autoencoders (AE) and its Field Programmable Gate Array (FPGA) implementation. The proposed digital circuit of AEs has circuit parameters and a common interface to be considered as an object in the system. A combination of FPGA and software for AEs can realize a low power consumption system which can process flexibly in real time. Experimental results show that the proposed circuits work as an AE and the combination of the circuits construct a stacked AE.
Keyword (in Japanese) (See Japanese page) 
(in English) Deep Learning / Autoencoders / FPGA / hardware / Shared Synapse Architecture / / /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 81, SIS2016-13, pp. 65-68, June 2016.
Paper # SIS2016-13 
Date of Issue 2016-06-02 (SIS) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SIS2016-13

Conference Information
Committee SIS  
Conference Date 2016-06-09 - 2016-06-10 
Place (in Japanese) (See Japanese page) 
Place (in English) Kushiro Tourism and Convention cent. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Smart Personal Systems, etc. 
Paper Information
Registration To SIS 
Conference Code 2016-06-SIS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) FPGA implementation of Autoencoders for hw/sw complex system 
Sub Title (in English)  
Keyword(1) Deep Learning  
Keyword(2) Autoencoders  
Keyword(3) FPGA  
Keyword(4) hardware  
Keyword(5) Shared Synapse Architecture  
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1st Author's Name Suzuki Akihiro  
1st Author's Affiliation Kyushu Institute of Technology (Kyutech)
2nd Author's Name Morie Takashi  
2nd Author's Affiliation Kyushu Institute of Technology (Kyutech)
3rd Author's Name Tamukoh Hakaru  
3rd Author's Affiliation Kyushu Institute of Technology (Kyutech)
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Speaker Author-1 
Date Time 2016-06-10 10:45:00 
Presentation Time 20 minutes 
Registration for SIS 
Paper # SIS2016-13 
Volume (vol) vol.116 
Number (no) no.81 
Page pp.65-68 
#Pages 4 
Date of Issue 2016-06-02 (SIS) 

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