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Paper Abstract and Keywords
Presentation 2016-06-29 16:20
[Invited Lecture] Self-assembled monolayer-based gate dielectrics for low voltage MoS2 FET
Takamasa Kawanago, Shunri Oda (Tokyo Tech.) SDM2016-45
Abstract (in Japanese) (See Japanese page) 
(in English) In this study, self-assembled-monolayer (SAM)-based gate dielectrics is applied to the fabrication of molybdenum disulfide (MoS2) field-effect transistors (FETs). The gate dielectrics consist of plasma-oxidized aluminum oxides (AlOx) and a SAM. 2-voltage operational MoS2 FETs were demonstrated with the ultrathin SAM-based gate dielectrics. Furthermore, a subthreshold slope (SS) of 69 mV/dec and no hysteresis were observed. The small SS and no hysteresis in Id–Vg characteristics indicate the superior interfacial properties of the MoS2/SAM structure. The SAM-based gate dielectrics are found to be applicable to the fabrication of low-voltage MoS2 FETs.
Keyword (in Japanese) (See Japanese page) 
(in English) Self-assembled monolayer / Molybdenum disulfide / Field-effect transistors / Interfacial properties / / / /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 118, SDM2016-45, pp. 69-74, June 2016.
Paper # SDM2016-45 
Date of Issue 2016-06-22 (SDM) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee SDM  
Conference Date 2016-06-29 - 2016-06-29 
Place (in Japanese) (See Japanese page) 
Place (in English) Campus Innovation Center Tokyo 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Material Science and Process Technology for MOS Devices and Memories 
Paper Information
Registration To SDM 
Conference Code 2016-06-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Self-assembled monolayer-based gate dielectrics for low voltage MoS2 FET 
Sub Title (in English)  
Keyword(1) Self-assembled monolayer  
Keyword(2) Molybdenum disulfide  
Keyword(3) Field-effect transistors  
Keyword(4) Interfacial properties  
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1st Author's Name Takamasa Kawanago  
1st Author's Affiliation Tokyo Institute of Technology (Tokyo Tech.)
2nd Author's Name Shunri Oda  
2nd Author's Affiliation Tokyo Institute of Technology (Tokyo Tech.)
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Speaker Author-1 
Date Time 2016-06-29 16:20:00 
Presentation Time 20 minutes 
Registration for SDM 
Paper # SDM2016-45 
Volume (vol) vol.116 
Number (no) no.118 
Page pp.69-74 
#Pages 6 
Date of Issue 2016-06-22 (SDM) 

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