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| Presentation | 2016-09-06 10:55 A Study of Methodology and Tools for Open-source FPGA Accelerators Takuya Nakamichi, Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)  RECONF2016-34 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Today's information and communication society requires more and higher-performance computing devices with the constraint of lower power consumption. Recent studies reveal efficiency of hardware accelerators implemented on Field-programmable gate array (FPGA). However, HW/SW co-design is still difficult because of the gap between hardware and software development methods. Therefore, we have proposed a heterogeneous computing oriented development environment named hCODE. FPGA accelerators is shared by the hCODE repository. In this paper, we propose methodology and tools to use the open-source accelerators and show that the accelerators can be easily integrated with the software. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | FPGA / HW/SW Co-design / Open-source Accelerator / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 116, no. 210, RECONF2016-34, pp. 45-50, Sept. 2016. | |
| Paper # | RECONF2016-34 | |
| Date of Issue | 2016-08-29 (RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Notes on Review | This article is a technical report without peer review, and its polished version will be published elsewhere. | |
| Download PDF | RECONF2016-34 |
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| Conference Information | |
| Committee | RECONF |
| Conference Date | 2016-09-05 - 2016-09-06 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Univ. of Toyama |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Reconfigurable Systems, etc. |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2016-09-RECONF |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Study of Methodology and Tools for Open-source FPGA Accelerators |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | HW/SW Co-design |
| Keyword(3) | Open-source Accelerator |
| Keyword(4) | |
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| Keyword(8) | |
| 1st Author's Name | Takuya Nakamichi |
| 1st Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 2nd Author's Name | Qian Zhao |
| 2nd Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 3rd Author's Name | Motoki Amagasaki |
| 3rd Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 4th Author's Name | Masahiro Iida |
| 4th Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 5th Author's Name | Morihiro Kuga |
| 5th Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 6th Author's Name | Toshinori Sueyoshi |
| 6th Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
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| Speaker | Author-1 |
| Date Time | 2016-09-06 10:55:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | RECONF2016-34 |
| Volume (vol) | vol.116 |
| Number (no) | no.210 |
| Page | pp.45-50 |
| #Pages | 6 |
| Date of Issue | 2016-08-29 (RECONF) |
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