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Paper Abstract and Keywords
Presentation 2017-07-26 11:15
An Efficient GPU Implementation of Computing the Summed Area Table
Yutaro Emoto, Takumi Honda, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2017-19
Abstract (in Japanese) (See Japanese page) 
(in English) The main contribution of this paper is to show an efficient GPU implementation of computing the summed area table. Existing implementations compute SAT in parallel dividing input matrix into submatrix. In the implementations, to synchronize the computation, the execution is divided into several kernels that are launched in serial. Our implementation adopts status flag to check the progress of computation and calls a kernel only once to compute SAT. In this paper, we show a GPU implementation that can perform a single kernel call on NVIDIA Titan X. The experimental results show that our SAT implementation runs faster at most 2.03 times than existing GPU implementations and 41.68 times faster than sequential algorithm using the CPU.
Keyword (in Japanese) (See Japanese page) 
(in English) summed area table / prefix-sum / GPU / CUDA / / / /  
Reference Info. IEICE Tech. Rep., vol. 117, no. 153, CPSY2017-19, pp. 19-24, July 2017.
Paper # CPSY2017-19 
Date of Issue 2017-07-19 (CPSY) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2017-19

Conference Information
Committee CPSY DC IPSJ-ARC  
Conference Date 2017-07-26 - 2017-07-28 
Place (in Japanese) (See Japanese page) 
Place (in English) Akita Atorion-Building (Akita) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Parallel, Distributed and Cooperative Processing 
Paper Information
Registration To CPSY 
Conference Code 2017-07-CPSY-DC-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) An Efficient GPU Implementation of Computing the Summed Area Table 
Sub Title (in English)  
Keyword(1) summed area table  
Keyword(2) prefix-sum  
Keyword(3) GPU  
Keyword(4) CUDA  
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1st Author's Name Yutaro Emoto  
1st Author's Affiliation Hiroshima University (Hiroshima Univ.)
2nd Author's Name Takumi Honda  
2nd Author's Affiliation Hiroshima University (Hiroshima Univ.)
3rd Author's Name Koji Nakano  
3rd Author's Affiliation Hiroshima University (Hiroshima Univ.)
4th Author's Name Yasuaki Ito  
4th Author's Affiliation Hiroshima University (Hiroshima Univ.)
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Speaker Author-1 
Date Time 2017-07-26 11:15:00 
Presentation Time 30 minutes 
Registration for CPSY 
Paper # CPSY2017-19 
Volume (vol) vol.117 
Number (no) no.153 
Page pp.19-24 
#Pages
Date of Issue 2017-07-19 (CPSY) 


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