Paper Abstract and Keywords |
Presentation |
2017-11-07 11:20
Design to Improve Open Defect Detection for Test Based on IDDT Appearance Time Ayumu Kambara, Kouhei Ohtani, Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) VLD2017-49 DC2017-55 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Increasing open defects has become a problem.
We proposed a supply current test method with a built-in sensor for detecting open defects on signal lines in CMOS logic circuits.
The test method is based on an appearance time of dynamic supply current that flows when a test input vector is provided to a device under test.
We propose the improved test method to make the difference of IDDT appearance time greater.
In addition, SPICE simulation results show that open defects are detected by the improved sensor. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
supply current / IDDT testing / open defect / built-in current sensor / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 117, no. 274, DC2017-55, pp. 125-130, Nov. 2017. |
Paper # |
DC2017-55 |
Date of Issue |
2017-10-30 (VLD, DC) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2017-49 DC2017-55 |
Conference Information |
Committee |
VLD DC CPSY RECONF CPM ICD IE IPSJ-SLDM |
Conference Date |
2017-11-06 - 2017-11-08 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kumamoto-Kenminkouryukan Parea |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Gaia 2017 -New Field of VLSI Design- |
Paper Information |
Registration To |
DC |
Conference Code |
2017-11-VLD-DC-CPSY-RECONF-CPM-ICD-IE-SLDM-EMB-ARC |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Design to Improve Open Defect Detection for Test Based on IDDT Appearance Time |
Sub Title (in English) |
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Keyword(1) |
supply current |
Keyword(2) |
IDDT testing |
Keyword(3) |
open defect |
Keyword(4) |
built-in current sensor |
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1st Author's Name |
Ayumu Kambara |
1st Author's Affiliation |
Tokushima University (Tokushima Univ.) |
2nd Author's Name |
Kouhei Ohtani |
2nd Author's Affiliation |
Tokushima University (Tokushima Univ.) |
3rd Author's Name |
Hiroyuki Yotsuyanagi |
3rd Author's Affiliation |
Tokushima University (Tokushima Univ.) |
4th Author's Name |
Masaki Hashizume |
4th Author's Affiliation |
Tokushima University (Tokushima Univ.) |
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Speaker |
Author-1 |
Date Time |
2017-11-07 11:20:00 |
Presentation Time |
25 minutes |
Registration for |
DC |
Paper # |
VLD2017-49, DC2017-55 |
Volume (vol) |
vol.117 |
Number (no) |
no.273(VLD), no.274(DC) |
Page |
pp.125-130 |
#Pages |
6 |
Date of Issue |
2017-10-30 (VLD, DC) |
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