| Paper Abstract and Keywords |
| Presentation |
2018-01-30 14:00
[Invited Talk]
Reliability and Scalability of FinFET Split-Gate MONOS Array with Tight Vth Distribution for 16/14nm-node Embedded Flash Shibun Tsuda, Tomoya Saito, Hirokazu Nagase, Yoshiyuki Kawashima, Atsushi Yoshitomi, Shinobu Okanishi, Tomohiro Hayashi, Takuya Maruyama, Masao Inoue, Seiji Muranaka, Shigeki Kato, Takuya Hagiwara, Hirokazu Saito, Tadashi Yamaguchi, Masaru Kadoshima, Takahiro Maruyama, Tatsuyoshi Mihara, Hiroshi Yanagita, Kenichiro Sonoda, Tomohiro Yamashita, Yasuo Yamaguchi (renesas) SDM2017-94 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
Reliability and scalability of split-gate metal-oxide nitride oxide silicon (SG-MONOS) are discussed for 16/14nm-node embedded Flash in FinFET-era. FinFET SG-MONOS array is successfully operated with wide enough program/erase window. The Vth distribution of FinFET SG-MONOS array is kept tighter than planar even after retention. It is also demonstrated that Fin structure enables scaling of the control gate and the memory gate, which leads to the improvement of retention characteristics due to reduction of the mismatch of trapped carrier distribution during program/erase operation. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
embedded Flash memory / split gate cell / MONOS / FinFET / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 117, no. 427, SDM2017-94, pp. 13-16, Jan. 2018. |
| Paper # |
SDM2017-94 |
| Date of Issue |
2018-01-23 (SDM) |
| ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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SDM2017-94 |