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Paper Abstract and Keywords
Presentation 2018-03-01 16:50
Impedance Evaluation Mechanism with Automatic Calibration based on Automatic Balanced Bridge
Takaaki Shirakawa, Sakai Ryosuke, Nakatake Shigetoshi (Univ. of Kitakyusyu) VLD2017-118
Abstract (in Japanese) (See Japanese page) 
(in English) We propose a circuit mechanism with an automatic calibration
in the impedance measurement circuit
based on the automatic balanced bridge method.
In the automatic balancing bridge method,
an inverting amplifier circuit using an operational amplifier is used.
Since the measurement accuracy depends on the feedback resistance of the inverting amplifier circuit,
it is necessary to replace the feedback resistor each time
as checking the measured value of the resistance of the DUT (device-under-test)
so as to match the value.
In this work,
by employing a current type D/A converter as a feedback resistor,
we design a circuit with calibration of the resistance value
and attain highly accurate measurement by simulation.
Keyword (in Japanese) (See Japanese page) 
(in English) IoT devices / impedance / automatic balanced bridge / AC impedance method / / / /  
Reference Info. IEICE Tech. Rep., vol. 117, no. 455, VLD2017-118, pp. 175-179, Feb. 2018.
Paper # VLD2017-118 
Date of Issue 2018-02-21 (VLD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2017-118

Conference Information
Committee VLD HWS  
Conference Date 2018-02-28 - 2018-03-02 
Place (in Japanese) (See Japanese page) 
Place (in English) Okinawa Seinen Kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To VLD 
Conference Code 2018-02-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Impedance Evaluation Mechanism with Automatic Calibration based on Automatic Balanced Bridge 
Sub Title (in English)  
Keyword(1) IoT devices  
Keyword(2) impedance  
Keyword(3) automatic balanced bridge  
Keyword(4) AC impedance method  
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Keyword(6)  
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1st Author's Name Takaaki Shirakawa  
1st Author's Affiliation The University of Kitakyusyu (Univ. of Kitakyusyu)
2nd Author's Name Sakai Ryosuke  
2nd Author's Affiliation The University of Kitakyusyu (Univ. of Kitakyusyu)
3rd Author's Name Nakatake Shigetoshi  
3rd Author's Affiliation The University of Kitakyusyu (Univ. of Kitakyusyu)
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Speaker Author-1 
Date Time 2018-03-01 16:50:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2017-118 
Volume (vol) vol.117 
Number (no) no.455 
Page pp.175-179 
#Pages 5 
Date of Issue 2018-02-21 (VLD) 

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