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Paper Abstract and Keywords
Presentation 2018-03-08 15:50
Development of Attaching Security Enhancement Device
Kenji Toda, Kazukuni Kobara, Hirofumi Sakane (AIST) CPSY2017-150 DC2017-106
Abstract (in Japanese) (See Japanese page) 
(in English) A security enhancement device for information processing devices such as PCs and servers are developed. By attaching the enhancement device into peripheral I/O ports between a PC motherboard and peripheral devices, access control such as read / write detection or protection, of specified files and disk regions are achieved. The device is based on FPGA and having SATA, USB, DVI, LAN ports. Users can operate the devices safely based on direct control on them: using a keyboard and a mouse based on display output. This manuscript describes its functions and discusses the use of the device.
Keyword (in Japanese) (See Japanese page) 
(in English) Peripheral I/O relay / disk I/O / access control / security enhancement device / FPGA / / /  
Reference Info. IEICE Tech. Rep., vol. 117, no. 480, DC2017-106, pp. 281-287, March 2018.
Paper # DC2017-106 
Date of Issue 2018-02-28 (CPSY, DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2017-150 DC2017-106

Conference Information
Committee CPSY DC IPSJ-SLDM IPSJ-EMB IPSJ-ARC  
Conference Date 2018-03-07 - 2018-03-08 
Place (in Japanese) (See Japanese page) 
Place (in English) Okinoshima Bunka-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) ETNET2018 
Paper Information
Registration To DC 
Conference Code 2018-03-CPSY-DC-SLDM-EMB-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Development of Attaching Security Enhancement Device 
Sub Title (in English)  
Keyword(1) Peripheral I/O relay  
Keyword(2) disk I/O  
Keyword(3) access control  
Keyword(4) security enhancement device  
Keyword(5) FPGA  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Kenji Toda  
1st Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
2nd Author's Name Kazukuni Kobara  
2nd Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
3rd Author's Name Hirofumi Sakane  
3rd Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
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Speaker Author-1 
Date Time 2018-03-08 15:50:00 
Presentation Time 25 minutes 
Registration for DC 
Paper # CPSY2017-150, DC2017-106 
Volume (vol) vol.117 
Number (no) no.479(CPSY), no.480(DC) 
Page pp.281-287 
#Pages 7 
Date of Issue 2018-02-28 (CPSY, DC) 

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