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Paper Abstract and Keywords
Presentation 2018-08-07 16:45
Power Consumption Estimation by Die Temperature for Processors Implemented on FPGA
Hiroaki Kaneko, Akinori Kanasugi (Tokyo Denki Univ.) SDM2018-35 ICD2018-22
Abstract (in Japanese) (See Japanese page) 
(in English) The importance of thermal management and temperature sensing is increasing for processors with power consumption lower than one Watt for embedded applications. This paper proposes an estimation method to calculate the power consumption of the processor implemented on FPGA from die temperature. The die temperature is obtained by correcting on-chip temperature sensed in FPGA with board temperature on PCB. A temperature measurement system including a small processor was implemented on an FPGA and basic experimental data was confirmed.
Keyword (in Japanese) (See Japanese page) 
(in English) Die temperature / Embedded system / FPGA / On-chip temperature sensor / Power consumption / Processor / /  
Reference Info. IEICE Tech. Rep., vol. 118, no. 173, ICD2018-22, pp. 53-58, Aug. 2018.
Paper # ICD2018-22 
Date of Issue 2018-07-31 (SDM, ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2018-35 ICD2018-22

Conference Information
Committee SDM ICD ITE-IST  
Conference Date 2018-08-07 - 2018-08-09 
Place (in Japanese) (See Japanese page) 
Place (in English) Hokkaido Univ., Graduate School of IST M Bldg., M151 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Analog, Mixed Analog and Digital, RF, and Sensor Interface, Low Voltage/Low Power Techniques, Novel Devices/Circuits, and the Applications 
Paper Information
Registration To ICD 
Conference Code 2018-08-SDM-ICD-IST 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Power Consumption Estimation by Die Temperature for Processors Implemented on FPGA 
Sub Title (in English)  
Keyword(1) Die temperature  
Keyword(2) Embedded system  
Keyword(3) FPGA  
Keyword(4) On-chip temperature sensor  
Keyword(5) Power consumption  
Keyword(6) Processor  
Keyword(7)  
Keyword(8)  
1st Author's Name Hiroaki Kaneko  
1st Author's Affiliation Tokyo Denki University (Tokyo Denki Univ.)
2nd Author's Name Akinori Kanasugi  
2nd Author's Affiliation Tokyo Denki University (Tokyo Denki Univ.)
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Speaker Author-1 
Date Time 2018-08-07 16:45:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # SDM2018-35, ICD2018-22 
Volume (vol) vol.118 
Number (no) no.172(SDM), no.173(ICD) 
Page pp.53-58 
#Pages 6 
Date of Issue 2018-07-31 (SDM, ICD) 

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