Paper Abstract and Keywords |
Presentation |
2019-02-27 10:50
Spatial-Separable Convolution: Low memory CNN for FPGA Akira Jinguji, Masayuki Shimoda, Hiroki Nakahara (titech) VLD2018-94 HWS2018-57 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Object detection and image recognition using a Convolutional Neural Network (CNN) are used in embedded systems, which require reasonable price and power performance. Since CNN has high accuracy and large computation, real-time processing cannot be realized in CPU, and power consumption is too large in GPU. The CNN realization of the FPGA is low power consumption, however large on-chip memory is required and expensive. Typically, feature-map size in layers is large. This is a bottleneck in FPGA memory resource restrictions. We propose Feature-Map Separable Convolution, which makes an inference with divided feature-map. The feature-map size becomes smaller when an input image size becomes smaller. Thus, the buffer memory can be reduced. From experiments, we accomplished that the accuracy does not decrease so much with reducing buffer memory by 66%. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
FPGA / CNN / / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 118, no. 457, VLD2018-94, pp. 7-12, Feb. 2019. |
Paper # |
VLD2018-94 |
Date of Issue |
2019-02-20 (VLD, HWS) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2018-94 HWS2018-57 |
Conference Information |
Committee |
HWS VLD |
Conference Date |
2019-02-27 - 2019-03-02 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Okinawa Ken Seinen Kaikan |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Technology for System-on-Silicon, Hardware Security, etc. |
Paper Information |
Registration To |
VLD |
Conference Code |
2019-02-HWS-VLD |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
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(See Japanese page) |
Title (in English) |
Spatial-Separable Convolution: Low memory CNN for FPGA |
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1st Author's Name |
Akira Jinguji |
1st Author's Affiliation |
Tokyo Institute of Technology (titech) |
2nd Author's Name |
Masayuki Shimoda |
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Tokyo Institute of Technology (titech) |
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Hiroki Nakahara |
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Tokyo Institute of Technology (titech) |
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Speaker |
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Date Time |
2019-02-27 10:50:00 |
Presentation Time |
25 minutes |
Registration for |
VLD |
Paper # |
VLD2018-94, HWS2018-57 |
Volume (vol) |
vol.118 |
Number (no) |
no.457(VLD), no.458(HWS) |
Page |
pp.7-12 |
#Pages |
6 |
Date of Issue |
2019-02-20 (VLD, HWS) |
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