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Paper Abstract and Keywords
Presentation 2019-02-28 11:15
Implementation Technology for the Advanced Wafer Manufacturing Processes on Optical Transmission LSIs
Susumu Hirano, Hideo Yoshida, Kenya Sugihara, Yoshiaki Konishi, Takashi Sugihara, Yoshihiro Ogawa (Mitsubishi Electric) VLD2018-110 HWS2018-73
Abstract (in Japanese) (See Japanese page) 
(in English) It is indispensable to use the advanced wafer manufacturing processes to develop LSIs of high-speed optical transmission because its circuit gets intricate and large scale. There has been an increase in area and power consumption as factors which make it difficult to mount the LSI so far. Recently new issues are emerging, such as wiring delay, wiring congestion and increase in TAT (Turn Around Time) of layout design due to the progress of the process technology. Then we studied a design method for a process rule and a layout layer optimization method, which contributed to decrease area, power consumption. We also succeeded to suppress the new issues above. And the methods are easily mounted on the LSIs.
Keyword (in Japanese) (See Japanese page) 
(in English) LSI / ASIC / Advanced Wafer Manufacturing Process / Optical Transmission / Layout Design / / /  
Reference Info. IEICE Tech. Rep., vol. 118, no. 457, VLD2018-110, pp. 103-108, Feb. 2019.
Paper # VLD2018-110 
Date of Issue 2019-02-20 (VLD, HWS) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2018-110 HWS2018-73

Conference Information
Committee HWS VLD  
Conference Date 2019-02-27 - 2019-03-02 
Place (in Japanese) (See Japanese page) 
Place (in English) Okinawa Ken Seinen Kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Technology for System-on-Silicon, Hardware Security, etc. 
Paper Information
Registration To VLD 
Conference Code 2019-02-HWS-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Implementation Technology for the Advanced Wafer Manufacturing Processes on Optical Transmission LSIs 
Sub Title (in English)  
Keyword(1) LSI  
Keyword(2) ASIC  
Keyword(3) Advanced Wafer Manufacturing Process  
Keyword(4) Optical Transmission  
Keyword(5) Layout Design  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Susumu Hirano  
1st Author's Affiliation Mitsubishi Electric Corporation (Mitsubishi Electric)
2nd Author's Name Hideo Yoshida  
2nd Author's Affiliation Mitsubishi Electric Corporation (Mitsubishi Electric)
3rd Author's Name Kenya Sugihara  
3rd Author's Affiliation Mitsubishi Electric Corporation (Mitsubishi Electric)
4th Author's Name Yoshiaki Konishi  
4th Author's Affiliation Mitsubishi Electric Corporation (Mitsubishi Electric)
5th Author's Name Takashi Sugihara  
5th Author's Affiliation Mitsubishi Electric Corporation (Mitsubishi Electric)
6th Author's Name Yoshihiro Ogawa  
6th Author's Affiliation Mitsubishi Electric Corporation (Mitsubishi Electric)
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Speaker Author-1 
Date Time 2019-02-28 11:15:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2018-110, HWS2018-73 
Volume (vol) vol.118 
Number (no) no.457(VLD), no.458(HWS) 
Page pp.103-108 
#Pages 6 
Date of Issue 2019-02-20 (VLD, HWS) 

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